Signal analyzer and method of processing data from an input signal

US11798618B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11798618-B2
Application numberUS-201916685931-A
CountryUS
Kind codeB2
Filing dateNov 15, 2019
Priority dateNov 15, 2019
Publication dateOct 24, 2023
Grant dateOct 24, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A signal analyzer for analyzing an input signal comprises at least one input for receiving the input signal, at least one acquisition unit for acquiring data assigned to the input signal, an acquisition memory for storing the acquired data, the acquisition memory being adapted to store data in at least one ring buffer, and an acquisition memory controller to control at least one of writing the acquired data in the acquisition memory and reading the acquired data from the acquisition memory. The acquisition memory controller comprises a data read module for reading data of the at least one ring buffer. The acquisition memory controller comprises a copy write module which taps data read by the data read module. The acquisition memory comprises an additional memory section. The copy write module is configured to write the data tapped into the additional memory section. Further, a method of processing data from an input signal is described.

First claim

Opening claim text (preview).

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows: 1. A signal analyzer for analyzing an input signal, comprising: at least one input for receiving said input signal; at least one acquisition unit for acquiring data assigned to said input signal; an acquisition memory for storing said acquired data, said acquisition memory being adapted to store data in at least one ring buffer; and an acquisition memory controller to control at least one of writing said acquired data in said acquisition memory and reading said acquired data from said acquisition memory, said acquisition memory controller comprising a data read module for reading data from said at least one ring buffer; said acquisition memory controller comprising a copy write module which taps data read by said data read module; said acquisition memory comprising an additional memory section; and said copy write module being configured to write said data tapped into said additional memory section, such that the data tapped is written back into the acquisition memory; wherein said additional memory section is a reserved memory section in the acquisition memory, wherein only said data tapped is enabled to be written into said additional memory section, wherein said signal analyzer is an oscilloscope, and wherein said at least one acquisition unit, said acquisition memory comprising said ring buffer and said additional memory section, and said acquisition memory controller are integrated into the oscilloscope, wherein a post-processor is provided that receives said data read from said data read module, and wherein said post-processor is configured to post-process said data read, wherein said acquisition memory controller comprises at least one copy read module for reading said data from said additional memory section, and wherein a measurement module is provided that is connected with said copy read module, said measurement module being configured to perform measurements on said data read from said additional memory section. 2. The signal analyzer according to claim 1 , wherein said copy write module is configured to make a copy of said data extracted from said at least one ring buffer. 3. The signal analyzer according to claim 1 , wherein said post-processor is configured to visualize said data read. 4. The signal analyzer according to claim 1 , wherein said copy write module taps said data read from said post-processor. 5. The signal analyzer according to claim 1 , wherein the measurement module is configured to perform measurements on data assigned to said input signal. 6. The signal analyzer according to claim 1 , wherein said additional memory section comprises at least two reserved portions. 7. A method of processing data from an input signal, comprising: receiving said input signal; acquiring, by at least one acquisition unit, said input signal in order to obtain acquired data; storing said acquired data in an acquisition memory, wherein said acquired data are stored in at least one ring buffer; reading, by an acquisition memory controller, data from said at least one ring buffer; tapping, by said acquisition memory controller, said data read; and writing said data tapped into an additional memory section of said acquisition memory, such that the data tapped is written back into the acquisition memory; wherein said additional memory section is a reserved memory section in the acquisition memory, wherein only said data tapped is enabled to be written into said additional memory section, wherein the at least one acquisition unit, the acquisition memory comprising said ring buffer and said additional memory section, and the acquisition memory controller are integrated into an oscilloscope, wherein said data read are forwarded to a post-processor for post-processing said data read, wherein said acquisition memory controller comprises at least one copy read module for reading said data from said additional memory section, and wherein a measurement module is provided that is connected with said copy read module, and wherein measurements are performed, by means of the measurement module, on said data read from said additional memory section. 8. The method according to claim 7 , wherein a copy of said data extracted from said at least one ring buffer is made. 9. The method according to claim 7 , wherein said post-processor visualizes said data read. 10. The method according to claim 7 , wherein said data read are tapped from said post-processor. 11. The method according to claim 7 , wherein said data read are written into said additional memory section by a single buffer process, a dual buffer process or a triple buffer process. 12. The method according to claim 7 , wherein said tapping and writing is initiated manually or automatically by a post-processing counter. 13. The method according to claim 7 , wherein said tapping and writing is stopped by an interrupt.

Assignees

Inventors

Classifications

  • Input/output [I/O] data interface arrangements, e.g. data buffers · CPC title

  • for curve tracing of semiconductor characteristics, e.g. on oscilloscope · CPC title

  • G01R13/00Primary

    Arrangements for displaying electric variables or waveforms · CPC title

  • Storage oscilloscope function of cnc to diagnose servo drive, axis oscilloscope · CPC title

  • Digital output to display device {; Cooperation and interconnection of the display device with other functional units} · CPC title

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What does patent US11798618B2 cover?
A signal analyzer for analyzing an input signal comprises at least one input for receiving the input signal, at least one acquisition unit for acquiring data assigned to the input signal, an acquisition memory for storing the acquired data, the acquisition memory being adapted to store data in at least one ring buffer, and an acquisition memory controller to control at least one of writing the …
Who is the assignee on this patent?
Rohde & Schwarz
What technology area does this patent fall under?
Primary CPC classification G11C11/4093. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 24 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).