Techniques for compact LIDAR system

Patent metadata

Field	Value
Publication number	US-11768279-B2
Application number	US-202217849219-A
Country	US
Kind code	B2
Filing date	Jun 24, 2022
Priority date	Oct 5, 2021
Publication date	Sep 26, 2023
Grant date	Sep 26, 2023

Abstract

A light detection and ranging (LIDAR) system and apparatus including a photonics chip mounted to a substrate, the photonics chip including one or more optical components and one or more electrical components and one or more integrated circuit (IC) chips mounted to the photonics chip to process an electrical signal generated by the one or more optical components and the one or more electrical components, wherein the one or more IC chips are physically separated from the substrate to reduce crosstalk on the LIDAR apparatus.

First claim

The invention claimed is:

1. A light detection and ranging (LIDAR) apparatus, comprising:
a photonics chip mounted to a substrate, the photonics chip comprising one or more optical components and one or more electrical components; and
one or more integrated circuit (IC) chips mounted to the photonics chip to process an electrical signal generated by the one or more optical components and the one or more electrical components, wherein the one or more IC chips are physically separated from the substrate to reduce crosstalk on the LIDAR apparatus.

2. The LIDAR apparatus of claim 1 , wherein the photonics chip is mounted to the substrate by a first plurality of solder connections and the one or more IC chips are mounted to the photonics chip via a second plurality of solder connections.

3. The LIDAR apparatus of claim 1 , wherein the substrate comprises: a printed circuit board (PCB), a multi-layer organic type high density interconnect substrate, or a ceramic multi-layer substrate.

4. The LIDAR apparatus of claim 1 , further comprising:
a processing device operatively coupled to the photonics chip to further process the electrical signal generated by the one or more optical and electrical components of the photonics chip.

5. The LIDAR apparatus of claim 4 , wherein the processing device is configured to determine one or more properties of a target in a field of view of the LIDAR apparatus based on the electrical signal generated by the one or more optical and electrical components of the photonics chip.

6. The LIDAR apparatus of claim 1 , wherein the photonics chip is flip-chip bonded to the substrate and wherein the one or more IC chips coupled to the photonics chip are disposed between the substrate and the photonics chip.

7. The LIDAR apparatus of claim 1 , wherein the photonics chip comprises a plurality of through-silicon vias (TSVs) from a bottom surface of the photonics chip to a top surface of the photonics chip, the plurality of TSVs configured to electrically couple the one or more IC chips disposed on a top surface of the photonics chip to the substrate.

8. The LIDAR apparatus of claim 1 , wherein the one or more IC chips comprise at least one application specific integrated circuit (ASIC).

9. The LIDAR apparatus of claim 8 , wherein the at least one ASIC comprises: a trans-impedance amplifier (TIA) chip, a laser chip, or a semiconductor optical amplifier (SOA) gain chip.

10. The LIDAR apparatus of claim 1 , wherein the photonics chip comprises at least one of an edge coupler to provide a one-dimensional optical output array from the photonics chip or a grating coupler to provide a two-dimensional output array from the photonics chip.

11. A light detection and ranging (LIDAR) system, comprising:
a photonics chip mounted to a substrate, the photonics chip comprising one or more optical components and one or more electrical components; and
one or more integrated circuit (IC) chips mounted to the photonics chip to process an electrical signal generated by the one or more optical components and one or more electrical components wherein the one or more IC chips are physically separated from the substrate to reduce crosstalk on the LIDAR system.

12. The LIDAR system of claim 11 , wherein the photonics chip is mounted to the substrate by a first plurality of solder connections and the one or more IC chips are mounted to the photonics chip via a second plurality of solder connections.

13. The LIDAR system of claim 12 , wherein the substrate comprises: a printed circuit board (PCB), a multi-layer organic type high density interconnect substrate, or a ceramic multi-layer substrate.

14. The LIDAR system of claim 11 , further comprising:
a processing device operatively coupled to the photonics chip to further process the electrical signal generated by the one or more optical and electrical components of the photonics chip.

15. The LIDAR system of claim 14 , wherein the processing device is configured to determine one or more properties of a target in a field of view of the LIDAR system based on the electrical signal generated by the one or more optical and electrical components of the photonics chip.

16. The LIDAR system of claim 11 , wherein the photonics chip is flip-chip bonded to the substrate and wherein the one or more IC chips coupled to the photonics chip are disposed between the substrate and the photonics chip.

17. The LIDAR system of claim 11 , wherein the photonics chip comprises a plurality of through-silicon vias (TSVs) from a bottom surface of the photonics chip to a top surface of the photonics chip, the plurality of TSVs configured to electrically couple the one or more IC chips disposed on a top surface of the photonics chip to the substrate.

18. The LIDAR system of claim 11 , wherein the one or more IC chips comprise at least one application specific integrated circuit (ASIC).

19. The LIDAR system of claim 18 , wherein the at least one ASIC comprises: a trans-impedance amplifier (TIA) chip, a laser chip, or a semiconductor optical amplifier (SOA) gain chip.

20. The LIDAR system of claim 11 , wherein the photonics chip comprises at least one of an edge coupler to provide a one-dimensional optical output array from the photonics chip or a grating coupler to provide a two-dimensional output array from the photonics chip.

21. A method comprising:
mounting an integrated circuit (IC) chip to a surface of a photonics chip, the photonics chip comprising one or more optical components and one or more electrical components; and
mounting the photonics chip to a substrate, wherein the IC mounted to the surface of the photonics chip is electrically coupled to the substrate, wherein the one or more IC chips are physically separated from the substrate to reduce crosstalk between the IC chips and electronics of the substrate.

Assignees

• Aeva Inc

Inventors

• Tang Zhizhong
• Srinivasan Pradeep
• Shen Bing

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W72/071

  Connecting or disconnecting · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• G01S7/4863 Primary

  Detector arrays, e.g. charge-transfer gates · CPC title

• G01S7/4814

  of transmitters alone · CPC title