Phase change memory device based on nano current channel

Patent metadata

Field	Value
Publication number	US-11765987-B2
Application number	US-202117642706-A
Country	US
Kind code	B2
Filing date	Jan 5, 2021
Priority date	Dec 25, 2020
Publication date	Sep 19, 2023
Grant date	Sep 19, 2023

Abstract

A phase change memory device based on a nano current channel is provided. A nano current channel layer structure is adopted and configured to limit the current channel. As such, when flowing through the layer, the current enters the phase change layer from nano crystal grains with high electrical conductivity, and the current is thereby confined in the nano current channels. By using the nano-scale conductive channels, the contact area between the phase change layer and the electrode layer is significantly decreased, the current density at local contact channel is significantly increased, and heat generation efficiency of the current in the phase change layer is improved. Moreover, an electrically insulating and heat-insulating material with low electrical conductivity and low thermal conductivity prevents heat in the phase change layer from being dissipated to the electrode layer, and Joule heat utilization efficiency of the phase change layer is thereby improved.

First claim

What is claimed is:

1. A phase change memory device based on a nano current channel, comprising a nano current channel layer disposed between a phase change layer and an electrode layer, wherein the nano current channel layer is an electrically insulating and heat-insulating layer containing metal nano crystal grains penetrating a film thickness of the layer, the metal nano crystal grains directly connect the electrode layer and the phase change layer, a current reaches the phase change layer from the electrode layer only through nano current channels formed by the metal nano crystal grains, the phase change layer connects the electrode layer only through the metal nano crystal grains.

2. The phase change memory device according to claim 1 , wherein the nano current channel layer is a film structure formed by an electrically insulating and heat-insulating material and the metal nano crystal grains embedded in the electrically insulating and heat-insulating material, and the metal nano crystal grains penetrate the layer to form the nano current channels.

3. The phase change memory device according to claim 1 , wherein the phase change memory device further comprises: a first electrode layer, a second electrode layer, and a phase change material layer,
wherein the first electrode layer is adjacent to the phase change material layer, the phase change material layer is adjacent to the nano current channel layer, and the second electrode layer is adjacent to the nano current channel layer,
wherein the nano current channel layer is a single insulating layer containing the metal nano crystal grains penetrating the entire layer.

4. The phase change memory device according to claim 1 , wherein a material of the metal nano crystal grains is at least one of elementary substance metal materials selected from Fe, Pt, W, Cu, Zn, Al, Ni, Ti, Au, and Ag, or is an alloy material formed of any two or more of elementary substance metal materials selected from Fe, Pt, W, Cu, Zn, Al, Ni, Ti, Au, and Ag, or is a compound with good conductivity containing an elementary substance metal material selected from Fe, Pt, W, Cu, Zn, Al, Ni, Ti, Au, and Ag.

5. The phase change memory device according to claim 2 , wherein the metal nano crystal grains of the nano current channel layer exhibit larger electrical conductivity than the electrically insulating and heat-insulating material.

6. The phase change memory device according to claim 2 , wherein the electrically insulating and heat-insulating material has low thermal conductivity, and the electrically insulating and heat-insulating material is any one of silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, zinc oxide, tungsten oxide, titanium oxide, boron nitride, and silicon carbide.

7. The phase change memory device according to claim 1 , wherein a thickness of the nano current channel layer is 1 nm to 30 nm.

8. The phase change memory device according to claim 1 , wherein a size of the metal nano crystal grains in the insulating and heat-insulating layer is 1 nm to 30 nm, and the size of the metal nano crystal grains in a direction perpendicular to film surface is not less than the thickness of the nano current channel layer.

9. The phase change memory device according to claim 3 , wherein the phase change material layer is made of chalcogenide compound, and the chalcogenide compound includes an alloy compound formed by any one of S, Se, and Te and other non-chalcogenide materials, wherein the non-chalcogenide materials include one or more of Ge, Sb, Ga, Bi, In, Sn, Pb, Ag, N, and O.

10. The phase change memory device according to claim 3 , wherein phase change material layer comprises GeTe, GeSb, Ge 2 Sb 2 Te 5 , Ge 1 Sb 2 Te 4 , Sb 2 Te 3 , AgInSbTe, superlattice-like phase change material or a heterostructure phase change material containing chalcogenide compound comprising (GeTe)/(Sb 2 Te 3 ), (GeTe)/(Bi 2 Te 3 ), (Sb 2 Te 3 )/(TiTe 2 ), GeTe/Sb, (Ge—Sb—Te)/(Sb—Te), or (Ge—Sb—Te)/C.

11. The phase change memory device according to claim 3 , wherein the phase change material layer comprises a compound formed by doping or modifying a chalcogenide compound, wherein a dopant element comprises at least one of C, N, O, Cu, Cr, Sc, and Ti.

12. The phase change memory device according to claim 3 , wherein the phase change material layer comprises single-element phase change material Sb or Te.

13. The phase change memory device according to claim 3 , wherein a thickness of the phase change material layer is 20 nm to 200 nm.

14. The phase change memory device according to claim 3 , wherein a material of the first electrode layer and a material of the second electrode layer comprise metal elementary substances, a metal alloy thereof, and a metal compound.

15. The phase change memory device according to claim 3 , wherein a thickness of the first electrode layer and a thickness of the second electrode layer are 20 nm to 300 nm.

Assignees

• Univ Huazhong Science Tech

Inventors

• Cheng Xiaomin
• Li Han
• Zeng Yuntao
• Zhu Yunlai
• Liu Xiangjun
• Miao Xiangshui

Classifications

• H10N70/231 Primary

  based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect · CPC title

• H10N70/882 Primary

  Compounds of sulfur, selenium or tellurium, e.g. chalcogenides · CPC title

• H10N70/828 Primary

  Current flow limiting means within the switching material region, e.g. constrictions · CPC title

• H10N70/801

  Constructional details of multistable switching devices · CPC title

• H10N70/8616

  Thermal insulation means · CPC title