Semiconductor device including capacitor

Patent metadata

Field	Value
Publication number	US-11764283-B2
Application number	US-202217720198-A
Country	US
Kind code	B2
Filing date	Apr 13, 2022
Priority date	Jul 7, 2017
Publication date	Sep 19, 2023
Grant date	Sep 19, 2023

Abstract

Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide having the tetragonal crystal structure.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a substrate;
an interlayer dielectric layer on the substrate;
a plurality of contact plugs in the interlayer dielectric layer;
a plurality of bottom electrodes laterally spaced apart from each other, each of the plurality of bottom electrodes having a pillar shape, the plurality of bottom electrodes electrically connected to the plurality of contact plugs, respectively;
a top electrode on sidewalls and top surfaces of the plurality of bottom electrodes and on a top surface of the interlayer dielectric layer; and
a dielectric layer between the plurality of bottom electrodes and the top electrode and between the interlayer dielectric layer and the top electrode,
wherein the dielectric layer includes:
a hafnium oxide layer;
a first oxidation seed layer between the plurality of bottom electrodes and the hafnium oxide layer, wherein the first oxidation seed layer includes a first seed material and nitrogen; and
a second oxidation seed layer between the top electrode and the hafnium oxide layer.

2. The semiconductor device of claim 1 , wherein the first seed material includes at least one selected from the group consisting of zirconium oxide, niobium oxide, germanium oxide, tin oxide, molybdenum oxide, and titanium oxide.

3. The semiconductor device of claim 1 , wherein the second oxidation seed layer includes a second seed material and nitrogen.

4. The semiconductor device of claim 3 , wherein the second seed material includes at least one selected from the group consisting of zirconium oxide, niobium oxide, germanium oxide, tin oxide, molybdenum oxide, and titanium oxide.

5. The semiconductor device of claim 1 , wherein:
the first oxidation seed layer has a thickness ranging from 5 Å to 100 Å, and
the second oxidation seed layer has a thickness ranging from 5 Å to 100 Å.

6. The semiconductor device of claim 5 , wherein the hafnium oxide layer has a thickness ranging from 5 Å to 100 Å.

7. The semiconductor device of claim 6 , wherein the hafnium oxide layer and the second oxidation seed layer are in contact with each other.

8. The semiconductor device of claim 1 , wherein the hafnium oxide layer and the first oxidation seed layer are in contact with each other.

9. A semiconductor device, comprising:
a substrate;
an interlayer dielectric layer on the substrate;
a plurality of contact plugs in the interlayer dielectric layer;
a plurality of first electrodes laterally spaced apart from each other, each of the plurality of first electrodes having a pillar shape, the plurality of first electrodes disposed on the plurality of contact plugs, respectively;
a second electrode on sidewalls and top surfaces of the plurality of first electrodes and on a top surface of the interlayer dielectric layer; and
a dielectric layer between the plurality of first electrodes and the second electrode,
wherein the dielectric layer includes:
a hafnium oxide layer;
a first oxidation seed layer between the plurality of first electrodes and the hafnium oxide layer; and
a second oxidation seed layer between the second electrode and the hafnium oxide layer,
wherein the first oxidation seed layer includes a first seed material and nitrogen, and
wherein the second oxidation seed layer includes a second seed material and nitrogen.

10. The semiconductor device of claim 9 , wherein the first oxidation seed layer is in contact with the plurality of first electrodes.

11. The semiconductor device of claim 9 , wherein the second oxidation seed layer is in contact with the second electrode.

12. The semiconductor device of claim 9 ,
wherein the hafnium oxide layer and the first oxidation seed layer are in contact with each other, and
wherein the hafnium oxide layer and the second oxidation seed layer are in contact with each other.

13. The semiconductor device of claim 9 , wherein the dielectric layer extends between the interlayer dielectric layer and the second electrode.

14. The semiconductor device of claim 9 , wherein the first oxidation seed layer includes a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide layer, and
wherein the second oxidation seed layer a lattice constant having includes a lattice mismatch of 6% or less with one of the horizontal lattice constant and the vertical lattice constant of the hafnium oxide layer.

15. A semiconductor device, comprising:
a substrate;
an interlayer dielectric layer on the substrate;
a plurality of contact plugs in the interlayer dielectric layer;
a plurality of bottom electrodes laterally spaced apart from each other, each of the plurality of bottom electrodes having a pillar shape, the plurality of bottom electrodes disposed on the plurality of contact plugs and electrically connected to the plurality of contact plugs, respectively;
a top electrode on sidewalls and top surfaces of the plurality of bottom electrodes and on a top surface of the interlayer dielectric layer; and
a dielectric layer between the plurality of bottom electrodes and the top electrode and between the interlayer dielectric layer and the top electrode,
wherein the dielectric layer includes:
a hafnium oxide layer;
a first oxidation seed layer between the plurality of bottom electrodes and the hafnium oxide layer; and
a second oxidation seed layer between the top electrode and the hafnium oxide layer, wherein the second oxidation seed layer includes a second seed material and nitrogen,
the first oxidation seed layer has a thickness ranging from 5 Å to 100 Å, and
the second oxidation seed layer has a thickness ranging from 5 Å to 100 Å.

16. The semiconductor device of claim 15 , wherein the first oxidation seed layer includes a first seed material and nitrogen, and
wherein the first oxidation seed layer is in contact with the plurality of bottom electrodes.

17. The semiconductor device of claim 16 ,
wherein the second oxidation seed layer is in contact with the top electrode.

18. The semiconductor device of claim 16 , wherein the first seed material includes at least one of zirconium oxide, niobium oxide, germanium oxide, tin oxide, molybdenum oxide, and titanium oxide, and
wherein the second seed material includes at least one selected from the group consisting of zirconium oxide, niobium oxide, germanium oxide, tin oxide, molybdenum oxide, and titanium oxide.

19. The semiconductor device of claim 15 ,
wherein the first oxidation seed layer includes an oxidation seed material having a band gap energy of 3.0 eV or more.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Moon Sunmin
• Park Young-Lim
• Cho Kyuho
• Lim Hanjin

Classifications

• H10W10/0128 Primary

  comprising multiple local oxidation process steps · CPC title

• H10W10/13

  formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI] · CPC title

• H10W44/601

  Capacitive arrangements (H10W44/20 takes precedence) · CPC title

• H10D1/684 Primary

  the dielectrics comprising multiple layers, e.g. comprising buffer layers, seed layers or gradient layers · CPC title

• H10D64/693

  the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials · CPC title