Method for manufacturing semiconductor device
US-2015372122-A1 · Dec 24, 2015 · US
US11757048B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-11757048-B1 |
| Application number | US-202318139922-A |
| Country | US |
| Kind code | B1 |
| Filing date | Apr 26, 2023 |
| Priority date | May 31, 2022 |
| Publication date | Sep 12, 2023 |
| Grant date | Sep 12, 2023 |
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A gallium oxide Schottky barrier diode with negative beveled angle terminal and a production method thereof are provided. The production method includes four steps. In the first step, a photoresist layer with a preset pattern is formed on a gallium oxide epitaxial layer, where the gallium oxide epitaxial layer is formed on an upper surface of a gallium oxide substrate. In the second step, first electrode layer is formed on the gallium oxide epitaxial layer. In the third step, the gallium oxide substrate is rotated and the gallium oxide epitaxial layer is etched. In the fourth step, a second electrode layer is formed on the lower surface of the gallium oxide substrate.
Opening claim text (preview).
The invention claimed is: 1. A method comprising: forming a photoresist layer with a preset pattern on a gallium oxide epitaxial layer, wherein a first part of the gallium oxide epitaxial layer is not covered by the photoresist layer, and the gallium oxide epitaxial layer is formed on an upper surface of a gallium oxide substrate; forming a temporary electrode layer, wherein a first part of the temporary electrode layer is on the photoresist layer and a second part of the temporary electrode layer is on the first part of the gallium oxide epitaxial layer; removing the photoresist layer and the first part of the temporary electrode layer, wherein the second part of the temporary electrode layer is retained as a first electrode layer; rotating, in a first direction, the gallium oxide substrate such that the gallium oxide substrate and a horizontal plane form a first tilt angle, to expose a second part of the gallium oxide epitaxial layer that is partially under the first electrode layer, and etching the second part of the gallium oxide epitaxial layer, wherein the first tilt angle is less than 90 degrees and an etched gallium oxide epitaxial layer is formed; rotating, in a second direction, the gallium oxide substrate such that the gallium oxide substrate and the horizontal plane form a second tilt angle, to expose a first part of the etched gallium oxide epitaxial layer that is partially under the first electrode layer, and etching the first part of the etched gallium oxide epitaxial layer, wherein the second tilt angle is less than 90 degrees; and forming a second electrode layer on the lower surface of the gallium oxide substrate. 2. The method according to claim 1 , wherein forming the photoresist layer with the preset pattern comprises: forming a temporary photoresist layer on the gallium oxide epitaxial layer; and photoetching the temporary photoresist layer to form the preset pattern and expose the first part of the gallium oxide epitaxial layer, whereby forming the photoresist layer with the preset pattern. 3. The method according to claim 1 , wherein both the first tilt angle and the second tilt angle are more than 30 degrees and less than 60 degrees. 4. The method according to claim 1 , wherein the first tilt angle is equal to the second tilt angle. 5. The method according to claim 1 , wherein both etching the second part of the gallium oxide epitaxial layer and etching the first part of the etched gallium oxide epitaxial layer are performed a plurality of times. 6. The method according to claim 1 , wherein the temporary electrode layer is formed by electron beam evaporation or sputtering metal, and the second electrode layer is formed by electron beam evaporation. 7. The method according to claim 1 , wherein the gallium oxide substrate is a high doped N type gallium oxide substrate, and the gallium oxide epitaxial layer is a low doped N type gallium oxide epitaxial layer.
Chemical treatments · CPC title
for lift-off processes · CPC title
Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title
Dry etching; Plasma etching; Reactive-ion etching · CPC title
being semiconductor metal oxide, e.g. InGaZnO (Group II-VI materials H10D62/86; Group I-VI materials H10D62/871; Pb compounds or alloys H10D62/874) · CPC title
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