Power semiconductor module with laser-welded leadframe

Patent metadata

Field	Value
Publication number	US-11749633-B2
Application number	US-202017604717-A
Country	US
Kind code	B2
Filing date	Mar 12, 2020
Priority date	Apr 18, 2019
Publication date	Sep 5, 2023
Grant date	Sep 5, 2023

Abstract

A power semiconductor module includes a substrate with a structured metallization layer and a number of semiconductor chips. Each chip has a first power electrode bonded to the metallization layer. A leadframe is laser-welded to second power electrodes of the semiconductor chips for electrically interconnecting the semiconductor chips. A control conductor is attached to the leadframe opposite to the semiconductor chips and is electrically isolated from the leadframe. The control conductor is electrically connected to control electrodes of the semiconductor chips in the group.

First claim

The invention claimed is:

1. A power semiconductor module, comprising:
a substrate with a structured metallization layer;
a plurality of semiconductor chips, each chip having a first power electrode bonded to the metallization layer;
a leadframe laser-welded to second power electrodes of a group of the semiconductor chips for electrically interconnecting the semiconductor chips; and
a control conductor attached to the leadframe opposite to the semiconductor chips and electrically isolated from the leadframe, wherein the control conductor is electrically connected to control electrodes of the semiconductor chips in the group, the control conductor being laser-welded to at least one of the control electrodes.

2. The power semiconductor module of claim 1 , further comprising a flexible circuit board attached to the leadframe, wherein the control conductor is at least partially provided by a metal layer of the flexible circuit board.

3. The power semiconductor module of claim 1 , further comprising an electrically insulated wire attached to the leadframe, wherein the control conductor is at least partially provided by a metal core of the electrically insulated wire.

4. The power semiconductor module of claim 1 , further comprising a control substrate with an electrically insulating layer attached to the leadframe, wherein the control conductor is at least partially provided by a metallization layer of the control substrate.

5. The power semiconductor module of claim 1 , wherein the control conductor is further connected via a wire bond to the at least one of the control electrodes.

6. The power semiconductor module of claim 1 , wherein the first power electrode of each chip is wire bonded to the metallization layer.

7. The power semiconductor module of claim 1 , wherein the control conductor is part of a control substrate or a flexible circuit board that protrudes over the leadframe at the control electrode of each semiconductor chip.

8. The power semiconductor module of claim 7 , wherein the control conductor is electrically connected with a through-via with at least one of the control electrodes.

9. The power semiconductor module of claim 1 ,
wherein a gate conductor and an auxiliary conductor are attached to the leadframe opposite to the group of semiconductor chips and electrically isolated from the leadframe; and
wherein two strips of the auxiliary conductor are provided on two sides of the gate conductor.

10. The power semiconductor module of claim 1 ,
wherein the second power electrode of each semiconductor chip comprises a metallic buffer plate bonded to the semiconductor chip; and
wherein the leadframe is laser-welded to the buffer plate of each semiconductor chip.

11. The power semiconductor module of claim 1 , wherein the leadframe provides a power terminal of the power semiconductor module, the power terminal protruding from a housing of the power semiconductor module.

12. The power semiconductor module of claim 11 ,
wherein a control terminal protrudes from the housing at the same level as the leadframe, the control terminal being made of the same material and with the same thickness as the leadframe; and
wherein the control terminal is electrically interconnected with the control conductor inside the housing.

13. The power semiconductor module of claim 1 ,
wherein the semiconductor chips are arranged in at least one row; and
wherein the leadframe comprises a central part running along the row and branching parts that extend from the central part over the semiconductor chips of the row.

14. The power semiconductor module of claim 13 , wherein the branching pails are bent towards the semiconductor chips.

15. A power semiconductor module, comprising:
a substrate with a structured metallization layer;
a first group of semiconductor chips, each chip of the first group having a first power electrode bonded to the metallization layer in parallel with the other chips of the first group;
a second group of semiconductor chips, each chip of the second group having a first power electrode bonded to the metallization layer in parallel with the other chips of the second group;
a first leadframe laser-welded to second power electrodes of the semiconductor chips of the first group of the semiconductor chips;
a second leadframe laser-welded to second power electrodes of the semiconductor chips of the second group of the semiconductor chips;
a first control conductor electrically connected to control electrodes of the semiconductor chips in the first group and electrically isolated from the first and second leadframes; and
a second control conductor electrically connected to control electrodes of the semiconductor chips in the second group and electrically isolated from the first and second leadframes, wherein the first control conductor is laser-welded to the control electrode of at least one semiconductor chip of the first group or the second control conductor is laser-welded to the control electrode of at least one semiconductor chip of the second group.

16. The power semiconductor module of claim 15 , wherein the power semiconductor module forms a half-bridge and the first group of semiconductor chips form a low-side switch and the second group of semiconductor switches form a high-side switch.

17. The power semiconductor module of claim 15 ,
wherein the semiconductor chips of the first group are arranged along a center line of the power semiconductor module;
wherein the semiconductor chips of the second group are arranged in two rows outside of the first group at two sides of the first group; and
wherein the first leadframe is arranged between the substrate of the power semiconductor module and the second leadframe.

18. The power semiconductor module of claim 17 , wherein the semiconductor chips of the first group are arranged in two rows along the center line of the power semiconductor module.

19. The power semiconductor module of claim 15 , wherein the first control conductor is laser-welded to the control electrode of the at least one semiconductor chip of the first group and the second control conductor is laser-welded to the control electrode of the at least one semiconductor chip of the second group.

20. A power semiconductor module, comprising:
a substrate with a structured metallization layer;
a plurality of semiconductor chips arranged in first and second rows, each chip comprising a first power electrode bonded to the metallization layer;
a leadframe comprising a central part running parallel to the first and second rows and branching parts, each branching part extending from the central part toward a respective semiconductor of the first or second row, wherein a second power electrode of each semiconductor chip is laser-welded to the respective branching part; and
a control conductor attached to a surface of the leadframe opposite the semiconductor chips and electrically isolated from the leadframe, wherein the control conductor is electrically connected to control electrodes of the semiconductor chips, the control conductor being laser-welded to the control electrodes.

21. The power semiconductor module of claim 20 , wherein the branching parts are bent towards the semiconductor chips.

22. The power semiconductor module of claim 20 , further comprising:
a second plurality of semiconductor chips arranged in third and fourth rows, the first and second rows being between the third and fourth rows, wherein each chip comprises a first power

Assignees

• Hitachi Energy Switzerland Ag

Inventors

• Pavlicek Niko
• Mohn Fabian
• Thut Markus
• Koenig Swen

Classifications

• H10W90/763

  between laterally-adjacent chips · CPC title

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/07653

  changes in shapes · CPC title

• H10W72/07652

  changes in structures or sizes · CPC title