Methods and apparatus for processing a substrate

Patent metadata

Field	Value
Publication number	US-11749505-B2
Application number	US-202117183042-A
Country	US
Kind code	B2
Filing date	Feb 23, 2021
Priority date	Feb 23, 2021
Publication date	Sep 5, 2023
Grant date	Sep 5, 2023

Abstract

Methods and apparatus for processing a substrate are provided herein. For example, a matching network configured for use with a plasma processing chamber comprises an input configured to receive one or more radio frequency (RF) signals, an output configured to deliver the one or more RF signals to a processing chamber, a first variable capacitor disposed between the input and the output, a second variable capacitor disposed in parallel to the first variable capacitor, a MEMS array comprising a plurality of variable capacitors connected in series with the first variable capacitor, and a controller configured to tune the matching network between a first frequency for high-power operation and a second frequency for low-power operation.

First claim

What is claimed is:

1. A matching network configured for use with a plasma processing chamber, comprising:
an input configured to receive one or more radio frequency (RF) signals;
an output configured to deliver the one or more RF signals to a processing chamber;
a first variable capacitor disposed between the input and the output;
a second variable capacitor disposed in parallel to the first variable capacitor;
a MEMS array comprising a plurality of variable capacitors connected in series with the first variable capacitor; and
a controller configured to tune the matching network between a first frequency for high-power operation and a second frequency for low-power operation.

2. The matching network of claim 1 , wherein the controller is further configured to receive a TTL signal to activate the MEMS array.

3. The matching network of claim 1 , wherein the controller is further configured to tune the matching network within a pulse period of low-power operation.

4. The matching network of claim 1 , wherein the matching network is configured such that in high-power operation the first variable capacitor arid the second variable capacitor are hi an on configuration.

5. The matching network of claim 4 , wherein the matching network is configured such that in low-power operation the MEMS array is in an off configuration.

6. The matching network of claim 1 , wherein the matching network is configured such that in low-power operation the MEMS array is in an off configuration.

7. The matching network of claim 1 , wherein the plurality of variable capacitors comprise 4 variable capacitors connected in parallel.

8. The matching network of claim 1 , wherein a capacitance of the plurality of variable capacitors is about 50 F to about 500 pF.

9. The matching network of claim 1 , wherein a capacitance of the first variable capacitor and the second variable capacitor is about 50 F to about 500 pF.

10. The matching network of claim 1 , further comprising an input stage configured to connect to an RF power supply of the plasma processing chamber and an output stage configured to connect to a substrate support pedestal assembly of the plasma processing chamber.

11. A matching network configured for use with a plasma processing chamber, comprising:
an input configured to receive one or more radio frequency (RF) signals;
an output configured to deliver the one or more RF signals to a processing chamber;
a first variable capacitor disposed in parallel between the input and the output;
a second variable capacitor disposed in parallel to the first variable capacitor; and
a MEMS array comprising a plurality of variable capacitors connected in series with the first variable capacitor, the MEMS array one of a tunable-gap MEMS, changing-dielectric constant MEMS, varying-overlap MEMS, or floating-plate MEMS, and
wherein the matching network is tunable between a first frequency for high-power operation and a second frequency for low-power operation, within a pulse period of low-power operation.

12. A plasma processing chamber, comprising:
a chamber body and a chamber lid;
a RF source power connected to the chamber lid and configured to create a plasma from gases disposed in a processing region of the chamber body;
one or more RF bias power sources configured to sustain a plasma discharge; and
a matching network comprising:
an input configured to receive one or more radio frequency (RF) signals from the one or more RF bias power sources;
an output configured to deliver the one or more RF signals to the plasma processing chamber;
a first variable capacitor disposed between the input and the output;
a second variable capacitor disposed in parallel to the first variable capacitor;

a MEMS array comprising a plurality of variable capacitors connected in series with the first variable capacitor; and
a controller configured to tune the matching network between a first frequency for high-power operation and a second frequency for low-power operation.

13. The plasma processing chamber of claim 12 , wherein the controller is further configured to receive a TTL signal to activate the MEMS array.

14. The plasma processing chamber of claim 12 , wherein the controller is further configured to tune the matching network within a pulse period of low-power operation.

15. The plasma processing chamber of claim 12 , wherein the matching network is configured such that in high-power operation the first variable capacitor and the second variable capacitor are in an on configuration.

16. The plasma processing chamber of claim 15 , wherein the matching network is configured such that in low-power operation the MEMS array is in an off configuration.

17. The plasma processing chamber of claim 12 , wherein the matching network is configured such that in low-power operation the MEMS array is in an off configuration.

18. The plasma processing chamber of claim 12 , wherein the plurality of variable capacitors comprises 4 variable capacitors connected in parallel.

19. The plasma processing chamber of claim 12 , wherein a capacitance of the plurality of variable capacitors is about 50 F to about 500 pF.

20. The plasma processing chamber of claim 12 , wherein a capacitance of the first variable capacitor and the second variable capacitor is about 50 F to about 500 pF is about 50 F to about 500 pF.

Assignees

• Applied Materials Inc

Inventors

• Poulose John
• Ramaswamy Kartik

Classifications

• H01J37/32183 Primary

  Matching circuits · CPC title

• H03H7/38

  Impedance-matching networks · CPC title

• H03H2007/006

  MEMS · CPC title