Time-interleaved high-speed digital-to-analog converter (DAC) architecture with spur calibration
US-9685969-B1 · Jun 20, 2017 · US
US11742869B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11742869-B2 |
| Application number | US-202217573212-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 11, 2022 |
| Priority date | Jan 11, 2022 |
| Publication date | Aug 29, 2023 |
| Grant date | Aug 29, 2023 |
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A transmitter including a digital-to-analog converter (DAC) to generate an analog output corresponding to a transmitted signal. The transmitter further includes an analog-to-digital converter (ADC) coupled to the DAC. The ADC measures the analog output of the DAC to identify a set of digital samples. The ADC identifies, from the set of digital samples, a set of valid samples, wherein each valid sample has a voltage within a voltage range. The ADC extracts one or more signal properties from the set of valid samples.
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What is claimed is: 1. A transmitter comprising: a digital-to-analog converter (DAC) to generate an analog output corresponding to a transmitted signal; and an analog-to-digital converter (ADC) coupled to the DAC, the ADC to: measure the analog output of the DAC to identify a set of digital samples; identify, from the set of digital samples, a set of valid samples, wherein each valid sample has a voltage within a voltage range; and extract one or more signal properties from the set of valid samples. 2. The transmitter of claim 1 , further comprising digital logic to: receive the one or more signal properties from the ADC; conduct signal processing relating to the transmitted signal based on the one or more signal properties to generate one or more control signals; and provide the one or more control signals to the DAC, wherein the DAC calibrates the transmitted signal based on the one or more control signals. 3. The transmitter of claim 1 , wherein the ADC comprises a voltage generator to generate a minimum voltage threshold level and a maximum voltage threshold level of the voltage range. 4. The transmitter of claim 3 , wherein the ADC comprises: a first data detector coupled to the voltage generator, wherein the first data detector generates a first detected value based on a first comparison of a voltage level of a digital sample of the set of digital samples to the minimum voltage threshold level; and a second data detector coupled to the voltage generator, wherein the second data detector generates a second detected value based on a second comparison of the voltage level of the digital sample of the set of digital samples to the maximum voltage threshold level, wherein the digital sample is identified as a valid sample based on the first detected value and the second detected value. 5. The transmitter of claim 3 , the voltage generator to: generate a first voltage range comprising a first minimum voltage threshold level and a first maximum voltage threshold level, wherein a first voltage level of a first digital sample measured at a first time is compared to the first voltage range to determine if the first digital sample is a first valid sample of the set of valid samples; and generate a second voltage range comprising a second minimum voltage threshold level and a second maximum voltage threshold level, wherein a second voltage level of a second digital sample measured at a second time is compared to the second voltage range to determine if the second digital sample is a second valid sample of the set of valid samples. 6. The transmitter of claim 1 , further comprises control logic to: receive the one or more signal properties from the ADC; conduct signal processing relating to the transmitted signal based on the one or more signal properties to generate one or more calibration controls; and provide the one or more calibration controls to the DAC, wherein the DAC calibrates the transmitted signal based on the one or more calibration controls. 7. The transmitter of claim 6 , wherein the signal processing comprises one or more of a time-interleaved calibration processing, system characterization processing, or independent sampling phase processing. 8. The transmitter of claim 1 , wherein the one or more signal properties extracted from the set of valid samples comprise one or more of a first moment of the transmitted signal corresponding to a direct current level, a second moment of the transmitted signal corresponding to a power level, a cross-correlation property associated with a reference signal, or an auto-correlation property. 9. The transmitter of claim 1 , the ADC to synchronize a first timing associated with the transmitted signal with a corresponding timing of each of the set of digital samples. 10. The transmitter of claim 1 , wherein the set of digital samples are measured at a plurality of times within a time period; and wherein a voltage level of each digital sample is compared to a corresponding voltage range associated with a respective time of the plurality of times to identify the set of valid samples. 11. The transmitter of claim 1 , wherein the voltage range comprises a first threshold voltage level and a second threshold voltage level determined based at least in part on historical data associated with the transmitted signal. 12. A circuit comprising: a reference voltage generating digital-to-analog converter (DAC) to generate a first threshold voltage level and a second threshold voltage level of a voltage range; a first data detector coupled to the reference voltage generating DAC, wherein the first data detector generates a first detected value based on a first comparison of a voltage of a digital sample of a set of digital samples corresponding to a transmitted signal to a first threshold; and a second data detector coupled to the reference voltage generating DAC, wherein the second data detector generates a second detected value based on a second comparison of the voltage of the digital sample to a second voltage threshold level, wherein the digital sample is identified as a valid sample based on the first detected value and the second detected value. 13. The circuit of claim 12 , further comprising a module configured to identify one or more signal properties based at least in part on the valid sample. 14. The circuit of claim 13 , wherein the one or more signal properties comprise one or more of a first moment of the transmitted signal corresponding to a direct current level, a second moment of the transmitted signal corresponding to a power level, a cross-correlation property associated with a reference signal, or an auto-correlation property. 15. The circuit of claim 13 , wherein the one or more signal properties are provided by the circuit to digital logic configured to execute one or more digital signal processing algorithms. 16. The circuit of claim 15 , wherein the one or more digital signal processing algorithms comprise one or more of a time-interleaved calibration processing, system characterization processing, or independent sampling phase processing. 17. The circuit of claim 15 , wherein the one or more digital signal processing algorithms comprise a calibration algorithm configured to calibrate one or more of a gain, an offset, or a phase of the transmitted signal. 18. The circuit of claim 12 , wherein following generation of the first threshold voltage level and the second threshold voltage level of the voltage range, the reference voltage generating DAC generates a third threshold voltage level and a fourth threshold voltage level of a further voltage range used to identify another valid sample. 19. The circuit of claim 12 , further comprising a module to synchronize a first timing associated with the transmitted signal with a corresponding timing of the digital sample. 20. A method comprising: generating a first threshold voltage level and a second threshold voltage level of a voltage range; generating a first detected value based on a first comparison of a voltage of a digital sample of a set of digital samples corresponding to a transmitted signal to a first threshold; generating a second detected value based on a second comparison of the voltage of the digital sample to a second voltage threshold level, wherein the digital sample is identified as a valid sample based on the first detected value and the second detected value; and extracting one or more signal properties from the set of valid samples, wherein the one or more signal properties are pr
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