Circuit for detecting low-power optical data signal

Patent metadata

Field	Value
Publication number	US-11740406-B2
Application number	US-202217901182-A
Country	US
Kind code	B2
Filing date	Sep 1, 2022
Priority date	Sep 4, 2020
Publication date	Aug 29, 2023
Grant date	Aug 29, 2023

Abstract

A circuit for detecting an optical data signal includes a photonics substrate and first and second photodiodes formed in the photonics substrate. The first photodiode is configured to receive, via an input port formed in the photonics substrate, a first portion of the optical data signal and convert light power of the first portion of the optical data signal to generate a first current based on the optical data signal. The second photodiode is configured to output a second current without receiving any portion of the optical data signal. The second current corresponds to a dark current induced in the second photodiode. The circuit is configured to subtract the second current from the first current to generate an output signal corresponding to a power of the optical data signal without dark current induced in the first photodiode.

First claim

What is claimed is:

1. A circuit for detecting an optical data signal, the circuit comprising:
a photonics substrate;
a splitter configured to receive the optical data signal from an input port formed in the photonics substrate and output a first portion of the optical data signal and a second portion of the optical data signal;
a first tap coupler configured to receive the first portion of the optical data signal;
a second tap coupler configured to receive the second portion of the optical data signal;
a first photodiode formed in the photonics substrate, the first photodiode configured to (i) receive, via the first tap coupler, the first portion of the optical data signal, (ii) receive, via the second tap coupler, the second portion of the optical data signal, and (iii) convert light power of the first portion and the second portion to generate a first current; and
a second photodiode formed in the photonics substrate without being coupled to any input port or waveguide, the second photodiode being configured to output a second current without receiving any portion of the optical data signal, the second current corresponding to a dark current induced in the second photodiode,
the circuit being configured to subtract the second current from the first current to generate an output signal corresponding to a photocurrent of the optical data signal without dark current induced in the first photodiode.

2. The circuit of claim 1 , further comprising a first waveguide formed in the photonics substrate and coupled between the input port and the first photodiode, the first waveguide comprising the splitter and being configured to supply the optical data signal from the input port to the first photodiode.

3. The circuit of claim 2 , wherein the first photodiode is coupled to the first waveguide via the first tap coupler.

4. The circuit of claim 3 , wherein the first photodiode is coupled to first and second branches of the first waveguide, the first photodiode being configured to receive the first portion of the optical data signal via the first branch and receive the second portion of the optical data signal via the second branch.

5. The circuit of claim 4 , wherein:
the first photodiode is coupled to the first branch via the first tap coupler, and to the second branch via the second tap coupler; and
the first tap coupler and the second tap coupler are coupled to the input port via the splitter.

6. The circuit of claim 1 , wherein the first photodiode and the second photodiode form a close-neighbor pair.

7. The circuit of claim 6 , wherein the second photodiode is located less than 500 nanometers (nm) from the first photodiode in the photonics substrate.

8. The circuit of claim 6 , wherein the first photodiode and the second photodiode are formed in the photonics substrate under a same complementary metal-oxide semiconductor (CMOS) process.

9. The circuit of claim 6 , wherein the dark current induced in the second photodiode corresponds to a dark current induced in the first photodiode.

10. The circuit of claim 1 , wherein the second photodiode is coupled in series with the first photodiode such that current flowing through the first photodiode includes respective dark currents induced in the first photodiode and the second photodiode.

11. The circuit of claim 10 , wherein the circuit is configured to generate the output signal at a node between the first photodiode and the second photodiode.

12. The circuit of claim 11 , wherein the circuit is configured to generate the output signal based on a photocurrent induced in the first photodiode.

13. The circuit of claim 1 , wherein the second photodiode is not coupled to the first photodiode.

14. The circuit of claim 13 , wherein the second photodiode has a same reverse bias condition as the first photodiode.

15. The circuit of claim 14 , wherein the second photodiode is connected to a same reverse bias voltage as the first photodiode.

16. The circuit of claim 15 , wherein the output signal corresponds to a difference between an output current of the first photodiode and an output current of the second photodiode.

17. The circuit of claim 16 , wherein:
the output current of the first photodiode is a photocurrent induced in the first photodiode and a dark current induced in the first photodiode; and
the output current of the second photodiode is the dark current induced in the second photodiode.

18. The circuit of claim 1 , wherein the first portion of the optical data signal is less than an entirety of the optical data signal supplied to the input port.

19. A system comprising:
the circuit of claim 1 ;
a memory that stores a difference between sample currents output respectively by the first photodiode and the second photodiode when a same reverse bias voltage is applied to the first photodiode and the second photodiode, the difference indicating a variation in respective dark currents induced in the first photodiode and the second photodiode; and
a controller configured to calculate, based on the difference, a portion of the first current corresponding to a photocurrent induced in the first photodiode by the optical data signal.

Assignees

• Marvell Asia Pte Ltd

Inventors

• Lin Jie
• Kato Masaki
• Tourette Bruno
• Taylor Brian

Classifications

• G02B6/12019 Primary

  characterised by the optical interconnection to or from the AWG devices, e.g. integration or coupling with lasers or photodiodes (coupling integrated waveguide to fibre G02B6/30, to optoelectronic element G02B6/42; monolithic integration of integrated waveguides with other optical elements G02B6/12004) · CPC title

• H04B10/43

  using a single component as both light source and receiver, e.g. using a photoemitter as a photoreceiver · CPC title

• H04B10/6165

  Estimation of the phase of the received optical signal, phase error estimation or phase error correction · CPC title

• H04B10/691 Primary

  Arrangements for optimizing the photodetector in the receiver · CPC title

• H04B10/6911

  Photodiode bias control, e.g. for compensating temperature variations · CPC title