Display device

Patent metadata

Field	Value
Publication number	US-11735106-B2
Application number	US-202217942219-A
Country	US
Kind code	B2
Filing date	Sep 12, 2022
Priority date	Jun 28, 2018
Publication date	Aug 22, 2023
Grant date	Aug 22, 2023

Abstract

The present embodiments disclose a display device. A display device according to an embodiment of the present disclosure comprises a pixel unit including a plurality of pixels, each including a luminous element and a pixel circuit connected to the luminous element, a clock generator configured to generate a plurality of clock signals each corresponding to each of a plurality of subframes constituting a frame, and a parallel to serial converter configured to convert the plurality of clock signals to a serial clock signal and transfer the serial clock signal to the pixel unit, and wherein the pixel circuit of each pixel includes a first pixel circuit configured to control light-emission and non-emission of the luminous element in response to a control signal applied to each of the plurality of subframes and a second pixel circuit configured to store bit values of image data in the frame and generate the control signal based on the stored bit values and the serial clock signal such that each subframe included in the frame is controlled according to each bit value.

First claim

The invention claimed is:

1. A display apparatus comprising:
pixel circuits;
a first controller connected to the pixel circuits and providing a clock signal to the pixel circuits; and
a second controller connected to the pixel circuits and providing an image data signal to the pixel circuits; and
wherein each of the pixel circuits include:
a first pixel circuit configured to control light-emission and non-emission of a luminous element in response to a control signal; and
a second pixel circuit configured to store bit values of the image data from the second controller and generate the control signal based on the stored bit values and the clock signal from the first controller, and

wherein the control signal is applied to each of a plurality of subframes constituting a frame, and each subframe included in the frame is controlled according to each bit value.

2. The display apparatus of claim 1 , further comprising control unit configured to receive image data of a frame from an external device, generate a correction image data based on the received image data, and output the correction image data to the second controller.

3. The display apparatus of claim 2 , wherein the control unit further comprises gamma setting unit configured to set a gamma value using a gamma curve, set a correction value of image data according to the set gamma value, and output the set correction value to the control unit.

4. The display apparatus of claim 1 , further comprising control unit configured to receive image data of a frame from an external device,
wherein the control unit is configured to output a most significant bit (MSB) to a least significant bit (LSB) of the image data in a preset order to the second controller.

5. The display apparatus of claim 1 ,
wherein the pixel circuits form rows and columns,
wherein the first controller provides the clock signal to pixel circuits in at least one of the rows in common, and
wherein the second controller provides the image data signal to pixel circuits in at least one of the columns in common.

Assignees

• Sapien Semiconductors Inc

Inventors

• Lee Jae Hoon
• Jung Jun Young

Classifications

• G09G3/32 Primary

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title

• G09G2300/08

  Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements · CPC title

• G09G2310/0289

  Details of voltage level shifters arranged for use in a driving circuit · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2330/021

  Power management, e.g. power saving · CPC title