Nonvolatile memory device, system including the same and method of fabricating the same

Patent metadata

Field	Value
Publication number	US-11728304-B2
Application number	US-202117240641-A
Country	US
Kind code	B2
Filing date	Apr 26, 2021
Priority date	Sep 28, 2020
Publication date	Aug 15, 2023
Grant date	Aug 15, 2023

Abstract

A nonvolatile memory device including a substrate extending in a first direction, a ground selection line extending in the first direction on the substrate, a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction, a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction, a rear contact plug connected to a lower face of the landing pad and extending in a second direction intersecting the first direction, a front contact plug connected to an upper face of the landing pad opposite the lower face and extending in the second direction, an input/output pad electrically connected to the rear contact plug, and an upper bonding pad electrically connected to the front contact plug and connected to at least a part of a plurality of circuit elements of the nonvolatile memory device.

First claim

What is claimed is:

1. A nonvolatile memory device comprising:
a substrate extending in a first direction;
a ground selection line extending in the first direction on the substrate;
a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction;
a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction;
a rear contact plug connected to a lower face of the landing pad and extending in a second direction intersecting the first direction and perpendicular to an upper surface of the substrate;
a front contact plug connected to an upper face of the landing pad that is opposite the lower face, the front contact plug extending in the second direction;
an input/output pad connected to the rear contact plug; and
an upper bonding pad electrically connected to the front contact plug and connected to at least a part of a plurality of circuit elements of the nonvolatile memory device.

2. The nonvolatile memory device of claim 1 , wherein at least a part of a rear contact face at which the landing pad and the rear contact plug converge overlaps at least a part of a front contact face at which the landing pad and the front contact plug converge, when viewed in the second direction.

3. The nonvolatile memory device of claim 2 , wherein the front contact face overlaps the rear contact face when viewed in the second direction.

4. The nonvolatile memory device of claim 1 , wherein a rear contact face at which the landing pad and the rear contact plug converge does not overlap a front contact face at which the landing pad and the front contact plug converge, when viewed in the second direction.

5. The nonvolatile memory device of claim 1 , wherein a first length of the upper bonding pad in the first direction is smaller than a second length of the landing pad in the first direction.

6. The nonvolatile memory device of claim 1 , wherein the landing pad includes at least four landing pads formed sequentially in the second direction.

7. The nonvolatile memory device of claim 1 , wherein the landing pad is disposed at a same height as the ground selection line.

8. The nonvolatile memory device of claim 1 , wherein the landing pad is disposed at a same height as at least one of the plurality of word lines.

9. The nonvolatile memory device of claim 1 , wherein the landing pad includes at least four landing pads spaced apart from each other in the first direction.

10. A nonvolatile memory device comprising:
a peripheral region including a plurality of circuit elements; and
a cell region which is electrically connected to the plurality of circuit elements and that stores data,
wherein the cell region comprises
a substrate extending in a first direction,
a ground selection line extending in the first direction on the substrate,
a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction,
a channel structure penetrating the ground selection line and the plurality of word lines, and extending in a second direction intersecting the first direction and perpendicular to an upper surface of the substrate,
a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction,
a rear contact plug connected to a lower face of the landing pad and extending in the second direction intersecting the first direction,
a front contact plug connected to an upper face of the landing pad that is opposite the lower face, the front contact plug extending in the second direction,
an input/output pad electrically connected to the rear contact plug; and
an upper bonding pad electrically connected to the front contact plug and connected to at least a part of the plurality of circuit elements of the nonvolatile memory device.

11. The nonvolatile memory device of claim 10 , wherein at least a part of a rear contact face at which the landing pad and the rear contact plug converge overlaps at least a part of a front contact face at which the landing pad and the front contact plug converge, when viewed in the second direction.

12. The nonvolatile memory device of claim 11 , wherein the front contact face overlaps the rear contact face when viewed in the second direction.

13. The nonvolatile memory device of claim 10 , wherein a rear contact face at which the landing pad and the rear contact plug converge does not overlap a front contact face at which the landing pad and the front contact plug converge, when viewed in the second direction.

14. The nonvolatile memory device of claim 10 , wherein a first length of the upper bonding pad in the first direction is smaller than a second length of the landing pad in the first direction.

15. The nonvolatile memory device of claim 10 , wherein the landing pad includes at least four landing pads formed sequentially in the second direction.

16. The nonvolatile memory device of claim 10 , wherein the landing pad is disposed at a same height as the ground selection line.

17. The nonvolatile memory device of claim 10 , wherein the landing pad is disposed at a same height as at least one of the plurality of word lines.

18. The nonvolatile memory device of claim 10 , wherein the landing pad includes at least four landing pads spaced apart from each other in the first direction.

19. A nonvolatile memory system comprising:
a main board;
a nonvolatile memory device on the main board; and
a controller electrically connected to the nonvolatile memory device on the main board,
wherein the nonvolatile memory device comprises
a substrate extending in a first direction,
a ground selection line extending in the first direction on the substrate,
a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction,
a channel structure penetrating the ground selection line and the plurality of word lines and extending in a second direction intersecting the first direction and perpendicular to an upper surface of the substrate, the channel structure storing data,
a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction,
a rear contact plug connected to a lower face of the landing pad and extending in the second direction intersecting the first direction,
a front contact plug connected to an upper face of the landing pad that is opposite the lower face, the front contact plug extending in the second direction,
an input/output pad electrically connected to the rear contact plug, and
an upper bonding pad electrically connected to the front contact plug and connected to at least a part of a plurality of circuit elements of the nonvolatile memory device.

20. The nonvolatile memory system of claim 19 , wherein at least a part of a rear contact face at which the landing pad and the rear contact plug converge overlaps at least a part of a front contact face at which the landing pad and the front contact plug converge, when viewed in the second direction.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Ahn Jae Ho
• Kim Ji Won
• Hwang Sung-Min
• Lim Joon-Sung
• Sung Suk Kang

Classifications

• H10W90/792

  between multiple chips · CPC title

• H10W90/00 Primary

  Package configurations · CPC title

• H10W20/0698

  Local interconnections · CPC title

• H10W20/083

  the openings being via holes penetrating underlying conductors · CPC title

• H10W20/20

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title