Semiconductor device and method for manufacturing the same

US11715801B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11715801-B2
Application numberUS-202217687817-A
CountryUS
Kind codeB2
Filing dateMar 7, 2022
Priority dateMar 6, 2009
Publication dateAug 1, 2023
Grant dateAug 1, 2023

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a first oxide semiconductor film comprising a channel formation region; a second oxide semiconductor film comprising In, Al, and Zn; and an electrode electrically connected to the first oxide semiconductor film through the second oxide semiconductor film, wherein the second oxide semiconductor film comprises a first region in contact with the electrode and not overlapping with the first oxide semiconductor film, wherein the second oxide semiconductor film comprises a second region in contact with the first oxide semiconductor film, and wherein a resistance of the first region is lower than a resistance of the second region. 2. The semiconductor device according to claim 1 , wherein the second oxide semiconductor film comprises a third region covering an end portion of the first oxide semiconductor film. 3. The semiconductor device according to claim 1 , wherein the first oxide semiconductor film comprises In, Ga, and Zn. 4. The semiconductor device according to claim 1 , wherein the electrode comprises a metal whose normal electrode potential is smaller than normal electrode potential of zinc. 5. A semiconductor device comprising: a gate electrode; an insulating layer over the gate electrode; a first oxide semiconductor film over the insulating layer, the first oxide semiconductor film comprising a channel formation region; a second oxide semiconductor film over the first oxide semiconductor film, the second oxide semiconductor film comprising In, Al, and Zn; and an electrode over the second oxide semiconductor film, wherein the second oxide semiconductor film comprises a first region in contact with the electrode and not overlapping with the first oxide semiconductor film, wherein the second oxide semiconductor film comprises a second region in contact with the first oxide semiconductor film, and wherein a resistance of the first region is lower than a resistance of the second region. 6. The semiconductor device according to claim 5 , wherein the second oxide semiconductor film comprises a third region covering an end portion of the first oxide semiconductor film. 7. The semiconductor device according to claim 5 , wherein the first oxide semiconductor film comprises In, Ga, and Zn. 8. The semiconductor device according to claim 5 , wherein the electrode comprises a metal whose normal electrode potential is smaller than normal electrode potential of zinc. 9. A semiconductor device comprising: a gate electrode; an insulating layer over the gate electrode; a first oxide semiconductor film over the insulating layer, the first oxide semiconductor film comprising a channel formation region; a second oxide semiconductor film over and in direct contact with the first oxide semiconductor film, the second oxide semiconductor film comprising In, Al, and Zn; and an electrode over the second oxide semiconductor film, wherein the second oxide semiconductor film comprises a first region in direct contact with the electrode and not overlapping with the first oxide semiconductor film, wherein the second oxide semiconductor film comprises a second region in contact with the first oxide semiconductor film, and wherein a resistance of the first region is lower than a resistance of the second region. 10. The semiconductor device according to claim 9 , wherein the second oxide semiconductor film comprises a third region covering an end portion of the first oxide semiconductor film. 11. The semiconductor device according to claim 9 , wherein the first oxide semiconductor film comprises In, Ga, and Zn. 12. The semiconductor device according to claim 9 , wherein the electrode comprises a metal whose normal electrode potential is smaller than normal electrode potential of zinc.

Assignees

Inventors

Classifications

  • Oxides · CPC title

  • being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

  • using physical deposition, e.g. vacuum deposition or sputtering · CPC title

  • Conductor-insulator-semiconductor electrodes · CPC title

  • characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes · CPC title

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Frequently asked questions

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What does patent US11715801B2 cover?
It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation reg…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).