Semiconductor integrated circuit

US11711069B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11711069-B2
Application numberUS-202217696146-A
CountryUS
Kind codeB2
Filing dateMar 16, 2022
Priority dateMar 18, 2021
Publication dateJul 25, 2023
Grant dateJul 25, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a semiconductor integrated circuit including an oscillation circuit configured to output an oscillation signal, a heater configured to heat the oscillation circuit, a temperature sensor configured to detect a temperature of the oscillation circuit, and a nonvolatile memory configured to store temperature correction data. The oscillation circuit controls a frequency of the oscillation signal based on an output signal of the temperature sensor and the temperature correction data.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor integrated circuit, comprising: an oscillation circuit configured to output an oscillation signal; a heater configured to heat the oscillation circuit; a temperature sensor configured to detect a temperature of the oscillation circuit; a nonvolatile memory configured to store temperature correction data; a first terminal for external coupling; and a second terminal for external coupling, wherein the oscillation circuit is configured to control a frequency of the oscillation signal based on an output signal of the temperature sensor and the temperature correction data, the heater is a first resistance element whose one end is electrically coupled to the first terminal and whose other end is electrically coupled to the second terminal; the semiconductor integrated circuit further comprises: a first wiring electrically coupled to the first terminal and coupled to the one end of the first resistance element; a second wiring electrically coupled to the second terminal and coupled to the other end of the first resistance element; and a third wiring electrically coupled to the second terminal and coupled to the oscillation circuit, and a width of the first wiring and a width of the second wiring are larger than a width of the third wiring. 2. The semiconductor integrated circuit according to claim 1 , wherein the heater and the temperature sensor are disposed adjacent to the oscillation circuit. 3. The semiconductor integrated circuit according to claim 1 , further comprising: a logic circuit configured to generate frequency correction data based on the output signal of the temperature sensor and the temperature correction data, wherein the oscillation circuit is configured to control the frequency of the oscillation signal based on the frequency correction data. 4. The semiconductor integrated circuit according to claim 1 , wherein the second terminal is a ground terminal. 5. A semiconductor integrated circuit comprising: an oscillation circuit configured to output an oscillation signal; a heater configured to heat the oscillation circuit; a temperature sensor configured to detect a temperature of the oscillation circuit; and a nonvolatile memory configured to store temperature correction data, wherein the oscillation circuit is configured to control a frequency of the oscillation signal based on an output signal of the temperature sensor and the temperature correction data, the oscillation circuit includes: an operational amplifier; a first capacitor to be charged in a first period having a length corresponding to a first reference voltage to be input to the operational amplifier, and to be discharged in a second period having a length corresponding to the first reference voltage; a second capacitor to be charged in the second period and to be discharged in the first period; a first comparator configured to determine the first period by comparing a voltage of the first capacitor with a second reference voltage; and a second comparator configured to determine the second period by comparing a voltage of the second capacitor with the second reference voltage, the oscillation signal is at a first logic level in the first period, and the oscillation signal is at a second logic level in the second period, the operational amplifier includes a second resistance element through which a current having a magnitude corresponding to the first reference voltage flows, the larger the current flowing through the second resistance element is, the shorter the first period and the second period are, and the temperature sensor is disposed adjacent to the second resistance element. 6. The semiconductor integrated circuit according to claim 5 , wherein the heater and the temperature sensor are disposed adjacent to the oscillation circuit. 7. The semiconductor integrated circuit according to claim 5 , further comprising: a logic circuit configured to generate frequency correction data based on the output signal of the temperature sensor and the temperature correction data, wherein the oscillation circuit is configured to control the frequency of the oscillation signal based on the frequency correction data.

Assignees

Inventors

Classifications

  • H03K3/011Primary

    Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)} · CPC title

  • Astable circuits {(H03K3/0315 takes precedence)} · CPC title

  • by the use, as active elements, of semiconductors, not otherwise provided for · CPC title

  • by using a memory for digitally storing correction values (H03L1/025 takes precedence) · CPC title

  • Constructional details for maintaining temperature constant · CPC title

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Frequently asked questions

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What does patent US11711069B2 cover?
Provided is a semiconductor integrated circuit including an oscillation circuit configured to output an oscillation signal, a heater configured to heat the oscillation circuit, a temperature sensor configured to detect a temperature of the oscillation circuit, and a nonvolatile memory configured to store temperature correction data. The oscillation circuit controls a frequency of the oscillatio…
Who is the assignee on this patent?
Seiko Epson Corp
What technology area does this patent fall under?
Primary CPC classification H03K3/011. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 25 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).