Terminal member made of plurality of metal layers between two heat sinks

Patent metadata

Field	Value
Publication number	US-11710709-B2
Application number	US-202117228033-A
Country	US
Kind code	B2
Filing date	Apr 12, 2021
Priority date	Oct 15, 2018
Publication date	Jul 25, 2023
Grant date	Jul 25, 2023

Abstract

A semiconductor device includes a semiconductor chip made of a SiC substrate and having main electrodes on one surface and a rear surface, first and second heat sinks, respectively, disposed adjacent to the one surface and the rear surface, a terminal member interposed between the second heat sink and the semiconductor chip, and a plurality of bonding members disposed between the main electrodes, the first and second heat sinks, and the terminal member. The terminal member includes plural types of metal layers symmetrically layered in the plate thickness direction. The terminal member as a whole has a coefficient of linear expansion at least in a direction orthogonal to the plate thickness direction in a range larger than that of the semiconductor chip and smaller than that of the second heat sink.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor chip including a SiC substrate formed with an element, the semiconductor chip having main electrodes on one surface and a rear surface opposite to the one surface in a plate thickness direction;
a first heat sink and a second heat sink, as a pair of heat sinks, being disposed so as to interpose the semiconductor chip therebetween in the plate thickness direction, the first heat sink being adjacent to the one surface of the semiconductor chip, the second heat sink being adjacent to the rear surface of the semiconductor chip;
a terminal member being interposed between the second heat sink and the semiconductor chip, the terminal member electrically interconnecting the second heat sink and the main electrode on the rear surface; and
a plurality of bonding members being disposed between the main electrode on the one surface and the first heat sink, between the main electrode on the rear surface and the terminal member, and between the terminal member and the second heat sink, respectively, wherein
the terminal member is provided by a plurality of types of metal layers that are stacked in the plate thickness direction,
the terminal member as a whole has a coefficient of linear expansion at least in a direction orthogonal to the plate thickness direction in a range larger than that of the semiconductor chip and smaller than that of the second heat sink, and
the plurality of types of metal layers of the terminal member are symmetrically arranged in the plate thickness direction.

2. The semiconductor device according to claim 1 , wherein
the plurality of types of metal layers includes a Cu layer and an alloy layer containing Cu, and
the terminal member is a clad member in which the Cu layer and the alloy layer are layered in three or more layers in sequence.

3. The semiconductor device according to claim 2 , wherein
the terminal member has the Cu layer in a surface layer in the plate thickness direction.

4. The semiconductor device according to claim 2 , wherein
the terminal member has the alloy layer in a surface layer in the plate thickness direction.

5. The semiconductor device according to claim 2 , wherein
the alloy layer contains Cr.

6. The semiconductor device according to claim 1 , wherein
at least one of the plurality of bonding members includes a lead free solder that contains 3.2 to 3.8 mass % Ag, 0.6 to 0.8 mass % Cu, and 0.01 to 0.2 mass % Ni, as well as Sb and Bi.

7. A semiconductor device comprising:
a semiconductor chip including a SiC substrate formed with an element, the semiconductor chip having main electrodes on one surface and a rear surface opposite to the one surface in a plate thickness direction;
a first heat sink and a second heat sink, as a pair of heat sinks, being disposed so as to interpose the semiconductor chip therebetween in the plate thickness direction, the first heat sink being adjacent to the one surface of the semiconductor chip, the second heat sink being adjacent to the rear surface of the semiconductor chip;
a terminal member being interposed between the second heat sink and the semiconductor chip, the terminal member electrically interconnecting the second heat sink and the main electrode on the rear surface; and
a plurality of bonding members being disposed between the main electrode on the one surface and the first heat sink, between the main electrode on the rear surface and the terminal member, and between the terminal member and the second heat sink, respectively, wherein
the terminal member is provided by a clad member having three or more layers layered in the plate thickness direction,
the three or more layers include a Cu layer and an alloy layer containing Cu and Cr, and
the Cu layer and the alloy layer are symmetrically arranged in the plate thickness direction.

8. The semiconductor device according to claim 7 , wherein
at least one of the first heat sink and the second heat sink includes a clad member having three or more layers, and
the three or more layers includes a Cu layer and an alloy layer containing Cu that are layered in sequence.

9. The semiconductor device according to claim 8 , further comprising:
a sealing resin body integrally sealing the semiconductor chip, the terminal member, the bonding members, the first heat sink, and the second heat sink, wherein
the alloy layer of the at least one of the first heat sink and the second heat sink contains Cr, and is exposed from the sealing resin body to have a surface coplanar with a surface of the sealing resin body.

10. The semiconductor device according to claim 7 , wherein
at least one of the plurality of bonding members includes a lead free solder that contains 3.2 to 3.8 mass % Ag, 0.6 to 0.8 mass % Cu, and 0.01 to 0.2 mass % Ni, as well as Sb and Bi.

Assignees

• Denso Corp

Inventors

• Kaizu Ryoichi
• Nomura Takumi
• Yamagishi Tetsuto
• Inaba Yuki
• Sakamoto Yoshitsugu

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/352

  comprising metals or metalloids, e.g. solders · CPC title

• H10W72/325

  Die-attach connectors having a filler embedded in a matrix · CPC title

• H10W90/811

  Multiple chips on leadframes · CPC title

• H10W74/111

  the semiconductor body being completely enclosed · CPC title