Semiconductor device and method for manufacturing same

US10147671B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10147671-B2
Application numberUS-201515508506-A
CountryUS
Kind codeB2
Filing dateDec 4, 2015
Priority dateDec 10, 2014
Publication dateDec 4, 2018
Grant dateDec 4, 2018

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes: a semiconductor chip having an electrode on one surface; a first conductive member disposed on one surface side of the semiconductor chip; a metal member having a base member and a membrane and disposed between the semiconductor chip and the first conductive member; a first solder disposed between the electrode of the semiconductor chip and the metal member; and a second solder disposed between the metal member and the first conductive member. The membrane has a metal thin film arranged on the surface of the base member and an uneven oxide film. The uneven oxide film is arranged on the metal thin film in at least a part of a connection region of a surface of the metal member, the connection region connecting a first connection region to which the first solder is connected and a second connection region to which the second solder is connected.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a semiconductor chip having an electrode on one surface; a first conductive member disposed on one surface side of the semiconductor chip; a metal member having a base member made of a metal material and a membrane arranged on a surface of the base member, and disposed between the semiconductor chip and the first conductive member; a first solder disposed between the electrode of the semiconductor chip and the metal member, and connecting the electrode and the metal member; and a second solder disposed between the metal member and the first conductive member, and connecting the metal member and the first conductive member, wherein: the membrane has a metal thin film arranged on the surface of the base member and an uneven oxide film having a recess and a protrusion continuously disposed on a surface and, the uneven oxide film being made of an oxide of a metal that is the same as a metal which is a main component of the metal thin film; the uneven oxide film is arranged on the metal thin film in at least a part of a connection region of a surface of the metal member so as to restrict one of the first solder and the second solder from flowing into the other of the first solder and the second solder, the connection region connecting a first connection region to which the first solder is connected and a second connection region to which the second solder is connected; and the recess and the protrusion of the uneven oxide film are continuously and alternately disposed on the connection region along a connecting direction from the first connection region to the second connection region. 2. The semiconductor device according to claim 1 , wherein: the uneven oxide film is a laser beam irradiation film. 3. The semiconductor device according to claim 1 , wherein: the metal thin film includes Ni as a main component. 4. The semiconductor device according to claim 3 , wherein: the metal thin film is a plating film. 5. The semiconductor device according to claim 4 , wherein: the metal thin film is an electroless plating film. 6. The semiconductor device according to claim 1 , wherein: the surface of the metal member includes a first opposing surface which is opposed to the first conductive member and has the second connection region and an outer peripheral region surrounding the second connection region; an opposing distance between the outer peripheral region and the first conductive member is longer than an opposing distance between the second connection region and the first conductive member in a direction perpendicular to the one surface; and the uneven oxide film is disposed in the outer peripheral region. 7. The semiconductor device according to claim 6 , wherein: the metal member has a convex shape in which the second connection region protrudes with respect to the outer peripheral region. 8. The semiconductor device according to claim 1 , wherein: the metal member has a first opposing surface including the second connection region and opposing the first conductive member, a second opposing surface including the first connection region and opposing the semiconductor chip, and a side surface connecting the first opposing surface and the second opposing surface; and the uneven oxide film is disposed on the side surface. 9. The semiconductor device according to claim 8 , wherein: the uneven oxide film is disposed on the side surface in a predetermined range from an end on a side of the first opposing surface. 10. The semiconductor device according to claim 9 , wherein: the side surface has a first side surface portion which is a portion in the predetermined range from the end on the side of the first opposing surface, and a second side surface portion which is a portion between the first side surface portion and the second opposing surface and has a curved shape that protrudes outward; the second side surface portion and the second opposing surface provides the first connection region; and the uneven oxide film is disposed only on the first side surface portion of the side surface. 11. The semiconductor device according to claim 8 , wherein: the uneven oxide film is arranged along an entire circumference of the side surface. 12. The semiconductor device according to claim 1 , wherein: the uneven oxide film is disposed on an opposing surface of the first conductive member opposing the metal member so as to surround the second solder. 13. The semiconductor device according to claim 12 , wherein: the first conductive member has a groove to absorb an excess of the second solder in the opposing surface opposing the metal member; and the uneven oxide film is disposed adjacent to the groove. 14. The semiconductor device according to claim 1 , wherein: the semiconductor chip has an other electrode on a rear surface opposite to the one surface; and the semiconductor device further includes a second conductive member disposed on a rear surface side of the semiconductor chip, and a third solder disposed between the other electrode on the rear surface side of the semiconductor chip and the second conductive member, the third solder connecting the other electrode on the rear surface side and the second conductive member. 15. The semiconductor device according to claim 14 , wherein: the uneven oxide film is disposed on an opposing surface of the second conductive member opposing the semiconductor chip so as to surround the third solder. 16. The semiconductor device according to claim 1 , further comprising: a sealing resin body that integrally seals the semiconductor chip, at least a part of the first conductive member, the metal member, the first solder and the second solder, wherein: the sealing resin body contacts the uneven oxide film. 17. The semiconductor device according to claim 1 , wherein: the recess and the protrusion of the uneven oxide film provide a rough surface to which the first solder and the second solder hardly fit. 18. The semiconductor device according to claim 1 , wherein: the metal thin film has a recess and a protrusion; and the recess and the protrusion of the uneven oxide film are arranged at pitches finer than a width of the recess of the metal thin film.

Assignees

Inventors

Classifications

  • Encapsulations, e.g. protective coatings · CPC title

  • characterised by changes in properties of the die-attach connectors during connecting · CPC title

  • Flow barriers · CPC title

  • Die-attach connectors · CPC title

  • Multiple chips on leadframes · CPC title

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Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10147671B2 cover?
A semiconductor device includes: a semiconductor chip having an electrode on one surface; a first conductive member disposed on one surface side of the semiconductor chip; a metal member having a base member and a membrane and disposed between the semiconductor chip and the first conductive member; a first solder disposed between the electrode of the semiconductor chip and the metal member; and…
Who is the assignee on this patent?
Denso Corp
What technology area does this patent fall under?
Primary CPC classification H10W74/111. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 04 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).