Operating method of host device and memory device and memory system

Patent metadata

Field	Value
Publication number	US-11699469-B2
Application number	US-202117400368-A
Country	US
Kind code	B2
Filing date	Aug 12, 2021
Priority date	Nov 23, 2020
Publication date	Jul 11, 2023
Grant date	Jul 11, 2023

Abstract

Provided are an operating method of a host device, an operating method of a memory device, and a memory system. The operating method of a host device includes transmitting a request command for performing an eye-opening monitor (EOM) operation to a memory device, transmitting a parameter for performing the EOM operation to the memory device, transmitting pattern data for performing the EOM operation to the memory device, and receiving a first response signal including a result of the EOM operation performed based on the parameter and the pattern data from the memory device.

First claim

What is claimed is:

1. A method of operating a host device, the method comprising:
transmitting, by the host device, a request command for performing an eye-opening monitor (EOM) operation to a memory device;
transmitting, by the host device, at least one parameter for performing the EOM operation to the memory device;
transmitting, by the host device, pattern data for performing the EOM operation to the memory device; and
receiving, by the host device, a first response signal including a result of the EOM operation performed based on the at least one parameter and the pattern data from the memory device,
wherein the EOM operation is performed based on a comparison between a main path signal, which corresponds to a signal received from the host device and restored at the memory device, and an EOM path signal, which corresponds to a signal received from the host device and restored using an offset value at the memory device, and
wherein the at least one parameter for performing the EOM operation includes a parameter that defines the offset value.

2. The method of claim 1 , wherein the request command for performing the EOM operation includes a write buffer command.

3. The method of claim 2 , wherein a “MODE” field of the write buffer command is set to 1F.

4. The method of claim 1 , further comprising receiving, by the host device, a second response signal from the memory device in response to the request command for performing the EOM operation,
wherein the second response signal includes information on an amount of data receivable in one unit at the memory device, and
the at least one parameter and the pattern data are transmitted to the memory device based on the information on the amount of data receivable in one unit at the memory device.

5. The method of claim 1 , wherein the at least one parameter includes at least one of a time offset value, a phase offset value, and a voltage offset value.

6. The method of claim 5 , wherein the first response signal includes least one of information on whether the EOM operation has been successfully performed and an error count value obtained according to the EOM operation.

7. The method of claim 1 , further comprising generating, by the host device, the pattern data for performing the EOM operation.

8. The method of claim 1 , further comprising, prior to the transmitting the pattern data:
receiving, by the host device, the pattern data for performing the EOM operation from the memory device.

9. A method of operating a memory device, the method comprising:
receiving, by the memory device, a request command for performing an eye-opening monitor (EOM) operation from a host device;
receiving, by the memory device, at least one parameter for performing the EOM operation from the host device;
receiving, by the memory device, pattern data for performing the EOM operation from the host device; and
performing, by the memory device, the EOM operation based on the at least one parameter and the pattern data and transmitting a first response signal including a result of performing the EOM operation to the host device,
wherein the performing the EOM operation comprises performing the EOM operation based on a comparison between a main path signal, which corresponds to a signal received from the host device and restored at the memory device, and an EOM path signal, which corresponds to a signal received from the host device and restored using an offset value at the memory device, and
wherein the at least one parameter for performing the EOM operation includes a parameter that defines the offset value.

10. The method of claim 9 , wherein the request command for performing the EOM operation includes a write buffer command.

11. The method of claim 10 , wherein a “MODE” field of the write buffer command is set to 1F.

12. The method of claim 9 , further comprising transmitting, by the memory device, a second response signal to the host device in response to the request command for performing the EOM operation,
wherein the second response signal includes information on an amount of data receivable in one unit from the host device, and
the at least one parameter and the pattern data are received from the host device based on the information on the amount of data receivable in one unit from the host device.

13. The method of claim 9 , wherein the at least one parameter includes at least one of a time offset value, a phase offset value, and a voltage offset value.

14. The method of claim 13 , wherein the first response signal includes at least one of information on whether the EOM operation has been successfully performed and an error count value obtained according to the EOM operation.

15. The method of claim 9 , wherein the pattern data is generated in the host device and received by the memory device.

16. The method of claim 9 , further comprising, prior to the receiving the pattern data:
transmitting, by the memory device, the pattern data to the host device.

17. A memory system comprising:
a host device including a host controller; and
a memory device including a device controller and an eye-opening monitor (EOM),
wherein the host controller is configured to transmit a request command for performing an EOM operation to the memory device, transmit at least one parameter for performing the EOM operation to the memory device, transmit pattern data for performing the EOM operation to the memory device, and receive a first response signal including a result of the EOM operation performed based on the at least one parameter and the pattern data from the memory device,
wherein the EOM operation is performed based on a comparison between a main path signal, which corresponds to a signal received from the host device and restored at the memory device, and an EOM path signal, which corresponds to a signal received from the host device and restored using an offset value at the memory device, and
wherein the at least one parameter for performing the EOM operation includes a parameter that defines the offset value.

18. The memory system of claim 17 , wherein the EOM is included in a universal flash storage (UFS) interconnect (UIC) layer of the memory device.

19. The memory system of claim 18 , wherein the UIC layer further includes a special function register (SFR), and
the at least one parameter and the pattern data are stored in the SFR.

20. The memory system of claim 17 , wherein the request command for performing the EOM operation includes a write buffer command of which a “MODE” field is set to 1F.

21. The method of claim 5 , wherein the at least one parameter further includes phase resolution information.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kang Young San
• Hur Jeong
• Jun Walter
• Park Kwang Won
• Lee Kyoung Back

Classifications

• G11C7/1096 Primary

  Write circuits, e.g. I/O line write drivers · CPC title

• G11C7/1069

  I/O lines read out arrangements · CPC title

• G11C7/1084

  Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load · CPC title

• G11C7/1057

  Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load · CPC title

• G11C7/1045

  Read-write mode select circuits · CPC title