Analog-to-digital converter circuitry, an integrated circuit device, a photoplethysmogram detector, a wearable device and a method for analog-to-digital conversion

Patent metadata

Field	Value
Publication number	US-11689209-B2
Application number	US-202217590211-A
Country	US
Kind code	B2
Filing date	Feb 1, 2022
Priority date	Feb 5, 2021
Publication date	Jun 27, 2023
Grant date	Jun 27, 2023

Abstract

An analog-to-digital converter, ADC, circuitry, comprises: an integrator connected to a capacitor, the integrator being configured to switch between integrating an analog input signal for ramping an integrator output and integrating a reference input signal for returning integrator output towards a threshold; a comparator for comparing integrator output to the threshold; and a timer for determining a time duration during which the reference input signal is integrated, the time duration providing a digital representation of an analog input signal value; the ADC circuitry further comprising a feedforward noise shaping loop configured to store a quantization error signal based on digitizing a first sample, the comparator being configured to receive a feedforward noise shaping signal for changing the threshold for digitizing a later sample of the analog input signal following the first sample.

First claim

The invention claimed is:

1. An analog-to-digital converter, ADC, circuitry, comprising:
an input for receiving an analog input signal to be converted to a digital representation, and a reference input signal;
an integrator connected to a capacitor, wherein the integrator is configured to switch between integrating the analog input signal for ramping an integrator output and allow a charge to build up on the capacitor and integrating the reference input signal for returning integrator output towards a threshold;
a comparator for comparing integrator output to the threshold; and
a timer for determining a time duration during which the reference input signal is integrated for changing the integrator output to reach the threshold, wherein the time duration provides a digital representation of an analog input signal value;
wherein the ADC circuitry further comprises a feedforward noise shaping loop comprising at least one noise shaping capacitor configured to store a quantization error signal remaining on the integrator output based on digitizing a first sample of the analog input signal, wherein the comparator is configured to receive a feedforward noise shaping signal from the feedforward noise shaping loop based on the quantization error signal stored by the at least one noise shaping capacitor for changing the threshold of the comparator for digitizing a later sample of the analog input signal following the first sample.

2. The ADC circuitry according to claim 1 , wherein the feedforward noise shaping loop comprises two sets of noise shaping capacitors for storing quantization error signals from digitizing a first and a second sample of the analog input signal, respectively, wherein the feedforward noise shaping loop forms a second order noise shaping loop using quantization error signals from the first sample and the second sample for changing the threshold of the comparator for digitizing a third sample of the analog input signal following the first and the second samples.

3. The ADC circuitry according to claim 2 , wherein the feedforward noise shaping loop further comprises a noise shaping integrator for summing quantization error signals from each of the two sets of noise shaping capacitors to form the feedforward noise shaping signal.

4. The ADC circuitry according to claim 3 , wherein each set of noise shaping capacitors comprises a first noise shaping capacitor having a first capacitance and a second noise shaping capacitor having a second capacitance, and wherein the noise shaping integrator is configured to receive a quantization error signal from the first noise shaping capacitor of the set of noise shaping capacitors representing the second sample and a quantization error signal from the second noise shaping capacitor of the set of noise shaping capacitors representing the first sample.

5. The ADC circuitry according to claim 2 , wherein the feedforward noise shaping loop is configured to alternatingly store quantization error signals of a sequence of samples in a first set of noise shaping capacitors and in a second set of noise shaping capacitors.

6. The ADC circuitry according to claim 1 , wherein the ADC circuitry further comprises a gain element for amplifying the feedforward noise shaping signal.

7. The ADC circuitry according to claim 1 , wherein the input is configured to receive analog input signals in multiple channels, wherein the ADC circuitry comprises multiple feedforward noise shaping loops for storing quantization error signals for the multiple channels.

8. The ADC circuitry according to claim 1 , wherein the timer comprises a counter configured to output a multi-bit digital representation of the analog input signal value.

9. The ADC circuitry according to claim 1 , wherein the ADC circuitry is configured to receive the analog input signal in current domain, voltage domain or charge domain.

10. An integrated circuit device, comprising:
an ADC circuitry according to claim 1 , wherein the ADC circuitry is configured to receive an analog input signal for converting the analog input signal to a digital representation; and
digital processing circuitry for digital processing of the digital representation of the analog input signal.

11. A photoplethysmogram, PPG, detector, comprising:
at least one light source configured to generate pulsed light to illuminate skin of a subject for generating light modulated by blood flow of the subject;
a light detector configured to receive the modulated light from the subject, said light detector configured to generate an analog input signal; and
an ADC circuitry according to claim 1 , wherein the ADC circuitry is configured to receive the analog input signal from the light detector for converting the analog input signal to a digital representation.

12. The PPG detector according to claim 11 , further comprising a DC compensation loop synchronized with the pulsed light, wherein the DC compensation loop comprises a current digital-to-analog converter connected at the input for subtracting DC components from the analog input signal, wherein the DC compensation loop further comprises a threshold filter for providing an output for controlling the current digital-to-analog converter based on the digital representation of the analog input signal.

13. The PPG detector according to claim 11 , wherein the at least one light source is configured to alternatingly generate pulsed light of two different wavelengths for enabling detection of blood oxygen saturation, wherein the analog input signal comprises two alternating signals related to the two different wavelengths, and wherein the ADC circuitry comprises two feedforward noise shaping loops for handling noise shaping of the two alternating signals.

14. A wearable device comprising:
the PPG detector according to claim 11 ,
at least one carrier, which is configured to be worn on or around a body part of the subject, wherein the at least one carrier is configured to carry the PPG detector.

15. A method for analog-to-digital conversion of an analog input signal, comprising:
select to receive, during a first time period, a first sample of an analog input signal to be converted to a digital representation at an input of an analog-to-digital converter, ADC, circuitry;
integrate the analog input signal by an integrator connected to a capacitor during the first time period for ramping an integrator output;
select to receive, during a second time period following the first time period, a reference input signal at the input;
integrate the reference input signal for returning integrator output towards a threshold;
compare the integrator output at a comparator to the threshold;
determine a time duration of the second time period during which the reference input signal is integrated for changing the integrator output to reach the threshold, wherein the time duration provides a digital representation of an analog input signal value;
store, in at least one noise shaping capacitor of a feedforward noise shaping loop, a quantization error signal remaining on the integrator output, after the second time period; and
generate a feedforward noise shaping signal based on the stored quantization error signal and change the threshold of the comparator based on the feedforward noise shaping signal for a later sample of the analog input signal.

Assignees

• Imec Vzw
• Univ Leuven Kath
• Stichting Imec Nederland

Inventors

• Lin Qiuyang
• Van Helleputte Nick
• Van Wegberg Roland
• Song Shuang

Classifications

• H03M1/0604 Primary

  at one point, i.e. by adjusting a single reference value, e.g. bias or gain error (gain setting for range control H03M1/18) · CPC title

• H03M1/52 Primary

  Input signal integrated with linear return to datum · CPC title

• H03M1/0854

  of quantisation noise · CPC title

• H03M1/0607

  Offset or drift compensation (removal of offset already present on the analogue input signal H03M1/1295) · CPC title

• H03M1/1225

  using time-division multiplexing · CPC title