Thin-film resistor (TFR) module

US11670439B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11670439-B2
Application numberUS-202117499594-A
CountryUS
Kind codeB2
Filing dateOct 12, 2021
Priority dateJul 15, 2021
Publication dateJun 6, 2023
Grant dateJun 6, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A damascene method for manufacturing a thin film resistor (TFR) module is provided. A pair of heads are formed spaced apart from each other. A dielectric region is deposited over the pair of heads, and an opening extending over both heads is formed in the dielectric region. A TFR layer is deposited over the dielectric region and extending into the opening to define a cup-shaped TFR layer structure including (a) a laterally-extending TFR element base conductively connected to both heads and (b) vertical ridges extending upwardly from the laterally-extending TFR element base. A high density plasma (HDP) ridge removal process is performed to remove or shorten the vertical ridges from the cup-shaped TFR layer structure, thereby defining a TFR element having removed or shorted vertical ridges. The removal or shortening of the vertical ridges may improve the temperature coefficient of resistance (TCR) characteristic of the TFR element.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for manufacturing a thin film resistor (TFR) module, the method comprising: forming a pair of heads spaced apart from each other; depositing a dielectric region over the pair of heads; forming an opening in the dielectric region, the opening extending over at least a partial width of each head of the pair of heads; depositing a TFR layer over the dielectric region and extending into the opening to define a cup-shaped TFR layer structure including (a) a laterally-extending TFR element base conductively connected to both heads and (b) vertical ridges extending upwardly from the laterally-extending TFR element base; and performing a high density plasma ridge removal process to remove or shorten the vertical ridges from the cup-shaped TFR layer structure, thereby defining a TFR element having removed or shorted vertical ridges, wherein a high density plasma sputter etch forms inclined sidewalls on opposing sides of the opening. 2. The method of claim 1 , wherein forming the opening includes: depositing a photoresist layer; patterning a photoresist opening in the photoresist layer, the patterned photoresist opening extending laterally over at least a portion of each head of the pair of heads; and etching through the patterned photoresist opening to form the opening in the dielectric region. 3. The method of claim 1 , wherein the high density plasma ridge removal process includes: depositing a cap layer on the laterally-extending TFR element; and performing a high density plasma sputter etch that to remove or shorten the vertical ridges. 4. The method of claim 3 , comprising after the high density plasma sputter etch, filling the opening with an oxide material. 5. The method of claim 3 , wherein the cap layer comprises silicon oxide. 6. The method of claim 3 , wherein the cap layer comprises silicon nitride. 7. The method of claim 3 , wherein the high density plasma sputter etch removes a full height of the vertical ridges. 8. The method of claim 1 , wherein each of the pair of heads comprises a polysilicon structure having a silicide layer formed thereon. 9. The method of claim 1 , wherein each of the pair of heads comprises a metal structure formed in a metal interconnect layer. 10. The method of claim 1 , wherein the TFR layer comprises SiCr or SiCCr. 11. The method of claim 1 , comprising performing an anneal after depositing the TFR layer but before performing the high density plasma ridge removal process, wherein the anneal at a selected temperature and duration so as to alter a temperature coefficient of resistance (TCR) of the TFR layer. 12. The method of claim 11 , comprising performing an anneal to achieve a TCR of the TFR layer of TCR of 0±50 ppm/° C. 13. The method of claim 11 , comprising performing an anneal to achieve a TCR of the TFR layer of TCR of 0±10 ppm/° C. 14. The method of claim 11 , comprising performing the anneal at a temperature in the range of 450° C. to 550° C. 15. The method of claim 1 , comprising performing a chemical mechanical polishing process to remove portions of the TFR layer outside the opening. 16. The method of claim 15 , comprising, after the chemical mechanical polishing process, forming at least one of a phosphosilicate glass layer or an un-doped silicate glass cap oxide layer. 17. The method of claim 1 , comprising: forming a pair of vertically-extending contacts, each conductively connected with a respective one of the pair of heads; and forming a pair of upper connection elements, wherein each upper connection element is conductively connected with a respective one of the vertically-extending contacts. 18. A thin film resistor (TFR) module formed by a method comprising: forming a pair of heads spaced apart from each other; depositing a dielectric region over the pair of heads; forming an opening in the dielectric region, the opening extending over at least a partial width of each head of the pair of heads; depositing a TFR layer over the dielectric region and extending into the opening to define a cup-shaped TFR layer structure including (a) a laterally-extending TFR element base conductively connected to both heads and (b) vertical ridges extending upward from the laterally-extending TFR element base; and performing a high density plasma ridge removal process to remove or shorten the vertical ridges, wherein a high density plasma sputter etch forms inclined sidewalls on opposing sides of the opening. 19. A thin film resistor (TFR) module, comprising: a pair of spaced-apart heads; a TFR element including a laterally-extending TFR element base conductively connected to both heads to thereby define a conductive connection between the spaced-apart heads; a first dielectric region above the pair of heads; the first dielectric region having a pair of inclined sidewalls extending upwardly from respective edges of the TFR element; and a second dielectric region between the pair of inclined sidewalls of the first dielectric region; wherein the second dielectric region has at least one different material property than the first dielectric region. 20. The TFR of claim 19 , wherein a maximum height of the TFR element is less than 1,000 Å. 21. The TFR of claim 19 , wherein the TFR element is free from ridges extending vertically from the laterally-extending TFR element base. 22. The TFR of claim 19 , wherein the TFR element includes vertical ridges extending upwardly from the laterally-extending TFR element base, each vertical ridge having a vertical height of less than 200 Å. 23. The TFR of claim 19 , wherein: the pair of spaced-apart heads are spaced apart from each other in a first lateral direction; the TFR element has a lateral width in a second lateral direction perpendicular to the first lateral direction; and the TFR element includes vertical ridges extending upwardly from the laterally-extending TFR element base, each vertical ridge having a vertical height of less than 10% of the lateral width of the TFR element. 24. The TFR of claim 19 , wherein each of the heads comprises a polysilicon structure having a silicide layer formed thereon. 25. The TFR of claim 19 , wherein each of the heads comprises a metal structure formed in a metal interconnect layer. 26. A method for manufacturing a thin film resistor (TFR) module, the method comprising: forming a pair of heads spaced apart from each other; depositing a dielectric region over the pair of heads; forming an opening in the dielectric region, the opening extending over at least a partial width of each head of the pair of heads; depositing a TFR layer over the dielectric region and extending into the opening to define a cup-shaped TFR layer structure including (a) a laterally-extending TFR element base conductively connected to both heads and (b) vertical ridges extending upwardly from the laterally-extending TFR element base; and performing a high density plasma ridge removal process to remove a full height of the vertical ridges from the cup-shaped TFR layer structure, thereby defining a TFR element having removed or shorted vertical ridges. 27. The method of claim 26 , wherein the high density plasma ridge removal process includes: depositing a cap layer on the laterally-extending TFR element; and performing a high density plasma sputter etch that removes the full height of the vertical ridges from the c

Assignees

Inventors

Classifications

  • Resistive arrangements or effects of, or between, wiring layers · CPC title

  • Adjusting the temperature coefficient; Adjusting value of resistance by adjusting temperature coefficient of resistance · CPC title

  • by thin-film techniques · CPC title

  • H01C7/006Primary

    Thin film resistors · CPC title

  • Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material (consisting of loose powdered or granular material H01C8/00; resistors having potential barriers, e.g. field-effect resistors, H10D1/40 - H10D1/43, H10K10/10; semiconductor devices sensitive to electromagnetic or corpuscular radiation, e.g. photoresistors, H10F30/00; magnetic field controlled resistors H10N50/10; bulk negative resistance effect devices H10N80/00) · CPC title

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What does patent US11670439B2 cover?
A damascene method for manufacturing a thin film resistor (TFR) module is provided. A pair of heads are formed spaced apart from each other. A dielectric region is deposited over the pair of heads, and an opening extending over both heads is formed in the dielectric region. A TFR layer is deposited over the dielectric region and extending into the opening to define a cup-shaped TFR layer struct…
Who is the assignee on this patent?
Microchip Tech Inc
What technology area does this patent fall under?
Primary CPC classification H01C7/006. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 06 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).