CMOS laddered inverter ring oscillator

Patent metadata

Field	Value
Publication number	US-11664787-B2
Application number	US-202217686825-A
Country	US
Kind code	B2
Filing date	Mar 4, 2022
Priority date	Mar 4, 2021
Publication date	May 30, 2023
Grant date	May 30, 2023

Abstract

A ring oscillator includes a first set of at least three laddered inverter quantizer (LIQAF) circuits connected in stages that are in series, including a first LIQAF circuit and a last LIQAF circuit, and a feedback circuit from the last LIQAF circuit to the first LIQAF circuit having a logical NOT output compared to the first LIQAF circuit. A voltage input creates a pair of phase shifted waveforms in the first of the at least three LIQAF circuits that propagate sequentially through the stages of the at least three LIQAF circuits. Each stage has a pair of outputs to the next stage that are then phase shifted from the previous stage in the next stage.

First claim

What is claimed is:

1. A ring oscillator, comprising:
a first set of at least three laddered inverter quantizer (LIQAF) circuits connected in stages that are in series, including a first LIQAF circuit and a last LIQAF circuit; and
a feedback circuit from the last LIQAF circuit to the first LIQAF circuit, the last LIQAF circuit having a logical NOT output compared to a logical input of the first LIQAF circuit;
wherein a voltage input creates a pair of phase shifted waveforms in the first of the at least three LIQAF circuits that propagate sequentially through the stages of the at least three LIQAF circuits; and
wherein each stage has a pair of outputs to the next stage that are then phase shifted from the previous stage in the next stage.

2. The ring oscillator of claim 1 , wherein each LIQAF circuit of the at least three LIQAF circuits includes a first inverter coupled to a second inverter.

3. The ring oscillator of claim 2 , wherein the first inverter includes a first pair of semiconductors and the second inverter includes a second pair of semiconductors.

4. The ring oscillator of claim 3 , wherein the first pair of semiconductors are each n-channel metal oxide (NMOS) semiconductors, and the second pair of semiconductors are each p-channel metal oxide (PMOS) semiconductors.

5. The ring oscillator of claim 1 , wherein one of the pairs of outputs to the next stage produces the pair of phase shifted waveforms in the next stage are HI if the pairs of outputs is LOW, and LOW if the pairs of outputs is HI.

6. The ring oscillator of claim 1 , wherein the at least three LIQAF circuits include an odd number of LIQAF circuits.

7. The ring oscillator of claim 1 , further comprising a second set of LIQAF circuits that are connected vertically and in parallel with the first set of at least three LIQAF circuits, the second set itself including the same number of horizontal LIQAF circuits as the first set.

8. A method of constructing a ring oscillator, comprising:
connecting a first set of at least three laddered inverter quantizer (LIQAF) circuits in stages that are in series, including a first LIQAF circuit and a last LIQAF circuit; and
providing a feedback circuit from the last LIQAF circuit to the first LIQAF circuit, the last LIQAF circuit having a logical NOT output compared to a logical input of the first LIQAF circuit;
wherein a voltage input creates a pair of phase shifted waveforms in the first of the at least three LIQAF circuits that propagate sequentially through the stages of the at least three LIQAF circuits; and
wherein each stage has a pair of outputs to the next stage that are then phase shifted from the previous stage in the next stage.

9. The method of claim 8 , wherein connecting the first set further includes coupling a first inverter to a second inverter in each LIQAF circuit of the at least three LIQAF circuits.

10. The method of claim 9 , wherein the first inverter includes a first pair of semiconductors and the second inverter includes a second pair of semiconductors.

11. The method of claim 10 , wherein the first pair of semiconductors are each n-channel metal oxide (NMOS) semiconductors, and the second pair of semiconductors are each p-channel metal oxide (PMOS) semiconductors.

12. The method of claim 8 , wherein one of the pairs of outputs to the next stage produces the pair of phase shifted waveforms in the next stage are HI if the pairs of outputs is LOW, and LOW if the pairs of outputs is HI.

13. The method of claim 8 , wherein connecting the at least three LIQAF circuits includes connecting an odd number of LIQAF circuits.

14. The method of claim 8 , further comprising connecting a second set of LIQAF circuits vertically and in parallel with the first set of at least three LIQAF circuits, the second set itself including the same number of horizontal LIQAF circuits as the first set.

15. A ring oscillator, comprising:
a structure having a two level CMOS laddered inverter quantizer (LIQAF) and three horizontal LIQAF blocks;
the three horizontal LIQAF blocks in each of the two levels connected in stages that are in series, including a first LIQAF circuit and a last LIQAF circuit, and a feedback circuit from the last LIQAF circuit to the first LIQAF circuit, the last LIQAF circuit having a logical NOT output compared to a logical input of the first LIQAF circuit;
wherein the voltage input in the three horizontal LIQAF blocks in each of the two levels creates a pair of phase shifted waveforms in the first of the three horizontal LIQAF blocks that propagate sequentially through the stages of the three LIQAF blocks; and
wherein each stage of the three horizontal LIQAF blocks in each of the two levels has a pair of outputs to the next stage that are then phase shifted from the previous stage in the next stage.

16. The ring oscillator of claim 15 , wherein each LIQAF circuit of the three LIQAF circuits in each of the two levels includes a first inverter coupled to a second inverter.

17. The ring oscillator of claim 16 , wherein the first inverter in each of the two levels includes a first pair of semiconductors and the second inverter in each of the two levels includes a second pair of semiconductors.

18. The ring oscillator of claim 17 , wherein the first pair of semiconductors in each of the two levels are each n-channel metal oxide (NMOS) semiconductors, and the second pair of semiconductors in each of the two levels are each p-channel metal oxide (PMOS) semiconductors.

19. The ring oscillator of claim 15 , wherein one of the pairs of outputs to the next stage in each of the two levels produces the pair of phase shifted waveforms in the next stage in each of the two levels are HI if the pairs of outputs is LOW, and LOW if the pairs of outputs is HI.

20. The ring oscillator of claim 15 , wherein the three LIQAF circuits in each of the two levels include an odd number of LIQAF circuits.

Assignees

• Univ Wayne State

Inventors

• Alhawari Mohammad
• Edwards Ii Melvin D

Classifications

• H03K3/0315 Primary

  Ring oscillators · CPC title

• H03K19/20

  characterised by logic function, e.g. AND, OR, NOR, NOT circuits (H03K19/003 - H03K19/01 take precedence) · CPC title

• H03K3/021

  by the use, as active elements, of more than one type of element or means, e.g. BIMOS, composite devices such as IGBT · CPC title