Low capacitance transient voltage suppressor including a punch-through silicon controlled rectifier as low-side steering diode

Patent metadata

Field	Value
Publication number	US-11664368-B2
Application number	US-202017032900-A
Country	US
Kind code	B2
Filing date	Sep 25, 2020
Priority date	Oct 26, 2018
Publication date	May 30, 2023
Grant date	May 30, 2023

Abstract

A transient voltage suppressor (TVS) device uses a punch-through silicon controlled rectifier (SCR) structure for the low-side steering diode where the punch-through SCR structure realizes low capacitance at the protected node. In some embodiments, the punch-through silicon controlled rectifier of the low-side steering diode includes a first doped region formed in a first epitaxial layer, a first well formed spaced apart from the first doped region where the first well is not biased to any electrical potential, and a second doped region formed in the first well. The first doped region, the first epitaxial layer, the first well and the second doped region form the punch-through silicon controlled rectifier, with the first doped region forming the anode and the second doped region forming the cathode of the punch-through silicon controlled rectifier.

First claim

What is claimed is:

1. A transient voltage suppressing (TVS) device comprising:
a semiconductor layer comprising a first epitaxial layer of a first conductivity type;
a plurality of active regions formed in the semiconductor layer, the active regions being isolated from each other by isolation structures;
a high-side steering diode formed in a first active region and having an anode terminal coupled to a first protected node and a cathode terminal;
a low-side steering diode formed in a second active region of the plurality of active regions and having a cathode terminal coupled to a second protected node and an anode terminal;
wherein the low-side steering diode comprises a punch-through silicon controlled rectifier, the punch-through silicon controlled rectifier comprising:
a first doped region of a second conductivity type, opposite the first conductivity type, formed in the first epitaxial layer;
a first well of the second conductivity type formed in the first epitaxial layer spaced apart from the first doped region, wherein the first well is not biased to any electrical potential; and
a second doped region of the first conductivity type formed in the first well,
wherein the first doped region, the first epitaxial layer, the first well and the second doped region form the punch-through silicon controlled rectifier, the first doped region forming the anode and the second doped region forming the cathode of the punch-through silicon controlled rectifier.

2. The TVS device of claim 1 , wherein the semiconductor layer further comprises a second epitaxial layer of the second conductivity type and a first buried layer of the first conductivity type formed on the second epitaxial layer, wherein the first epitaxial layer is formed on the first buried layer.

3. The TVS device of claim 1 , wherein the punch-through silicon controlled rectifier of the low-side steering diode further comprises:
a third doped region of the second conductivity type formed in the first well and adjacent the second doped region, wherein the third doped region is not biased to any electrical potential.

4. The TVS device of claim 1 , wherein the punch-through silicon controlled rectifier of the low-side steering diode further comprises:
a second well region of the first conductivity type formed in the first epitaxial layer adjacent the first well and positioned between the first doped region and the first well.

5. The TVS device of claim 4 , wherein second well region is not biased to any electrical potential.

6. The TVS device of claim 1 , wherein the punch-through silicon controlled rectifier of the low-side steering diode further comprises:
a fourth doped region of the first conductivity type formed in the first epitaxial layer apart from the first well, the first doped region being formed inside the fourth doped region, the fourth doped region being more lightly doped than the first doped region and being more heavily doped than the first epitaxial layer.

7. The TVS device of claim 1 , wherein the high-side steering diode comprises a MOS-triggered silicon controlled rectifier formed in the first active region, the MOS-triggered silicon controlled rectifier including alternating p-type and n-type regions and a diode-connected MOS transistor integrated therein to trigger the silicon controlled rectifier to turn on.

8. The TVS device of claim 7 , wherein the MOS-triggered silicon controlled rectifier comprises:
a fifth doped region of the second conductivity type formed in the first epitaxial layer;
a sixth doped region of the second conductivity type formed in the first epitaxial layer and being spaced apart from the fifth doped region, the sixth doped region having a lower doping level than the doping level of the fifth doped region;
a seventh doped region of the first conductivity type formed at least partially in the sixth doped region;
an eighth doped region of the first conductivity type formed in the sixth doped region and spaced apart from the seventh doped region; and
a conductive gate formed above the semiconductor layer and insulated from the semiconductor layer by a gate dielectric layer, the conductive gate being positioned between the seventh doped region and the eighth doped region,
wherein the conductive gate, the seventh doped region and the eighth doped region form a MOS transistor with the sixth doped region being the body of the MOS transistor, the seventh doped region being electrically connected to the conductive gate to form a diode-connected MOS transistor.

9. The TVS device of claim 8 , wherein the fifth doped region, the first epitaxial layer, the sixth doped region and the eighth doped region form the silicon controlled rectifier, the diode-connected MOS transistor being turned on to trigger the silicon controlled rectifier to turn on.

10. The TVS device of claim 8 , wherein the sixth doped region has a doping level higher than the doping level of the first epitaxial layer and lower than the doping level of the fifth doped region.

11. The TVS device of claim 8 , wherein a threshold voltage of the MOS transistor is adjusted to adjust a breakdown voltage of the TVS device.

12. The TVS device of claim 8 , wherein the MOS-triggered silicon controlled rectifier further comprises:
a third well region of the first conductivity type formed in the first epitaxial layer adjacent the sixth doped region and positioned between the fifth doped region and the sixth doped region.

13. The TVS device of claim 1 , wherein the high-side steering diode comprises a PN junction diode.

14. The TVS device of claim 6 , wherein the high-side steering diode comprises a PN junction diode, the PN junction diode comprising:
a ninth doped region of the second conductivity type formed in the first active region of the first epitaxial layer;
a fourth well region of the first conductivity type formed in the first epitaxial layer spaced apart from the ninth doped region; and
a tenth doped region of the first conductivity type formed in the fourth well,
wherein the ninth doped region, the first epitaxial layer, the fourth well and the tenth doped region form the PN junction diode.

15. The TVS device of claim 14 , wherein the fourth well region has a doping level different from the doping level of the fourth doped region.

16. The TVS device of claim 1 , wherein the high-side steering diode comprises:
a plurality of PN junction diodes connected in series, a first PN junction diode of the plurality of PN junction diodes having an anode terminal coupled to the first protected node and a cathode terminal coupled to the next PN junction diode in the series, and a last PN junction diode of the plurality of PN junction diodes having an anode terminal coupled to the cathode terminal of a previous PN junction diode in the series and a cathode terminal.

17. The TVS device of claim 1 , wherein the high-side steering diode comprises a punch-through silicon controlled rectifier, the punch-through silicon controlled rectifier including alternating p-type and n-type regions where the n-type region between a pair of p-type regions is substantially depleted at a bias voltage of zero volt.

18. The TVS device of claim 1 , wherein a portion of the first epitaxial layer between the first doped region and the first well is depleted at a bias voltage of zero volt.

19. The TVS device of claim 1 , wherein the first conductivity type comprises N-type conductivity and the second conductivity type comprises P-type conductivity.

20. The TVS device of claim 2

Assignees

• Alpha & Omega Semiconductor Cayman Ltd
• Alpha & Omega Semiconductor Cayman Ltd

Inventors

• Mallikarjunaswamy Shekar

Classifications

• H10D62/129

  Cathode regions of diodes · CPC title

• H10D89/713

  including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices · CPC title

• H10D84/221

  of only diodes · CPC title

• H10D8/021

  of breakdown diodes · CPC title

• H10D8/00 Primary

  Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) · CPC title