Method and system for digital pre-distortion using look-up table

Patent metadata

Field	Value
Publication number	US-11658672-B2
Application number	US-202117455223-A
Country	US
Kind code	B2
Filing date	Nov 17, 2021
Priority date	Dec 23, 2020
Publication date	May 23, 2023
Grant date	May 23, 2023

Abstract

A digital predistortion system and method for pre-distorting an input to a non-linear system. The digital predistortion system includes a digital predistortion circuit and a memory. The digital predistortion circuit is configured to receive input data and modify the input data using at least one look-up table. The at least one look-up table is addressed by a signed real value of the input data. The memory is configured to store the at least one look-up table. The at least one look-up table is implemented based on a generalized memory polynomial model.

First claim

The invention claimed is:

1. A digital predistortion (DPD) system for pre-distorting an input to a non-linear system, comprising:
a digital predistortion circuit configured to receive input data and modify the input data using at least one look-up table, wherein the at least one look-up table is addressed by a signed real value of the input data, wherein the signed real value of the input data ranges from a negative value to a positive value; and
a memory configured to store the at least one look-up table.

2. The DPD system of claim 1 , wherein the non-linear system is modeled as:
y ( n )=Σ l=0 L-1 x ( n−l )Σ m=0 M-1 P l,m ( x ( n−l−m )),

where P l,m (x(n−l−m))=Σ k=0 K-1 a lkm (x(n−l−m)) k , x(n) is an input, y(n) is an output, L is a memory depth, M is a cross-term, K is a non-linearity order, and a lkm is the model's coefficients, wherein P l,m is implemented with the at least one look-up table.

3. The DPD system of claim 1 , wherein contents of the at least one look-up table is calculated directly.

4. The DPD system of claim 1 , wherein contents of the at least one look-up table is calculated indirectly.

5. The DPD system of claim 1 , wherein the non-linear system includes a power amplifier and/or a digital-to-analog converter.

6. The DPD system of claim 1 , wherein the digital predistortion circuit configured to dynamically update the at least one look-up table based on feedback from the non-linear system.

7. A transmitter including the DPD system of claim 1 .

8. A base station including the transmitter of claim 7 .

9. A method for pre-distorting an input to a non-linear system, comprising:
receiving input data; and
modifying the input data using at least one look-up table wherein the at least one look-up table is addressed by a signed real value of the input data, wherein the signed real value of the input data ranges from a negative value to a positive value.

10. The method of claim 9 , wherein the non-linear system is modeled as:
y ( n )=Σ l=0 L-1 x ( n−l )Σ m=0 M-1 P l,m ( x ( n−l−m )),

where P l,m (x(n−l−m))=Σ k=0 K-1 a lkm (x(n−l−m)) k , x(n) is an input, y(n) is an output, L is a memory depth, M is a cross-term, K is a non-linearity order, and a lkm is the model's coefficients, wherein P l,m is implemented with the at least one look-up table.

11. The method of claim 9 , wherein contents of the at least one look-up table is calculated directly.

12. The method of claim 9 , wherein contents of the at least one look-up table is calculated indirectly.

13. The method of claim 9 , wherein the non-linear system includes a power amplifier and/or a digital-to-analog converter.

14. The method of claim 9 , further comprising dynamically updating the at least one look-up table based on feedback from the non-linear system.

15. A non-transitory machine-readable storage including machine readable instructions, when executed, to implement a method of claim 9 .

Assignees

• Intel Corp

Inventors

• Sanchez Ramon
• Azadet Kameran

Classifications

• H03M1/1061

  using digitally programmable trimming circuits · CPC title

• H03F1/3258 Primary

  based on polynomial terms · CPC title

• H03M1/1052 Primary

  using two or more look-up tables each corresponding to a different type of error, e.g. for offset, gain error and non-linearity error respectively · CPC title

• H03F1/3247

  using feedback acting on predistortion circuits (H03F1/3264 takes precedence) · CPC title

• H03F2201/3233

  Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion · CPC title