Multilayer capacitor and board having the same mounted thereon

Patent metadata

Field	Value
Publication number	US-11657964-B2
Application number	US-202117549004-A
Country	US
Kind code	B2
Filing date	Dec 13, 2021
Priority date	Dec 22, 2020
Publication date	May 23, 2023
Grant date	May 23, 2023

Abstract

A multilayer capacitor includes a capacitor body including an active region having dielectric layers and internal electrodes alternately stacked therein, the capacitor body including upper and lower covers disposed on upper and lower surfaces of the active region, respectively; and an external electrode disposed on an external surface of the capacitor body. In one of the upper and lower covers, a portion thereof between a boundary surface of the active region and a boundary surface of the capacitor body is divided into a first cover region adjacent to the active region and a second cover region adjacent to the boundary surface of the capacitor body, and the first cover region includes grains having a core-shell structure doped with Sn. The first cover region includes 20% or more of Sn-doped core-shell structure grains, compared to the total of grains in the first cover region.

First claim

What is claimed is:

1. A multilayer capacitor comprising:
a capacitor body including an active region having dielectric layers and internal electrodes alternately stacked therein, the capacitor body including upper and lower covers disposed on upper and lower surfaces of the active region, respectively; and
an external electrode disposed on an external surface of the capacitor body,
wherein in one of the upper and lower covers, a portion thereof between a boundary surface of the active region and a boundary surface of the capacitor body is divided into a first cover region adjacent to the active region and a second cover region adjacent to the boundary surface of the capacitor body, and the first cover region includes grains having a core-shell structure doped with Sn, and
the first cover region includes 20% or more of Sn-doped core-shell structure grains, compared to the total of grains in the first cover region.

2. The multilayer capacitor of claim 1 , wherein in the grains of the core-shell structure doped with Sn, a ratio of Sn-doped portions in one grain is referred to as coverage, and the coverage is 30% or more.

3. The multilayer capacitor of claim 1 , wherein grains included in the second cover region do not include Sn.

4. The multilayer capacitor of claim 1 , wherein a size of grains of the second cover region is greater than a size of grains of the first cover region.

5. The multilayer capacitor of claim 1 , wherein a thickness of the first cover region is 40 to 80% of a sum of thicknesses of the first cover region and the second cover region.

6. The multilayer capacitor of claim 1 , wherein a grain size of the second cover region is greater than a grain size of the first cover region, and
a thickness of the first cover region is 40 to 80% of a sum of thicknesses of the first cover region and the second cover region.

7. The multilayer capacitor of claim 1 , wherein a grain size of the first cover region is 100 to 180 nm.

8. The multilayer capacitor of claim 1 , wherein a grain size of the second cover region is 200 nm or more.

9. The multilayer capacitor of claim 1 , wherein a grain size of the first cover region is 100 to 180 nm, and
a grain size of the second cover region is 200 nm or more.

10. The multilayer capacitor of claim 1 , wherein the grains of the first cover region have a higher molar ratio of Ba/Ti than a molar ratio of grains of the active region.

11. The multilayer capacitor of claim 1 , wherein a grain of the second cover region is the same material as a material of a grain of the active region.

12. The multilayer capacitor of claim 1 , wherein an average size of grains of the second cover region is greater than an average grain size of grains of the first cover region.

13. The multilayer capacitor of claim 1 , wherein an average grain size of the first cover region is 100 to 180 nm.

14. The multilayer capacitor of claim 1 , wherein an average grain size of the second cover region is 200 nm or more.

15. The multilayer capacitor of claim 1 , wherein an average grain size of the first cover region is 100 to 180 nm, and
an average grain size of the second cover region is 200 nm or more.

16. A board having a multilayer capacitor mounted thereon, the board comprising:
a substrate having a plurality of electrode pads disposed on an upper surface; and
the multilayer capacitor installed on the substrate in such a manner that an external electrode is mounted on a pad,
wherein the multilayer capacitor includes:
a capacitor body including an active region having dielectric layers and internal electrodes alternately stacked therein, the capacitor body including upper and lower covers disposed on upper and lower surfaces of the active region, respectively; and
an external electrode disposed on an external surface of the capacitor body,
in one of the upper and lower covers, a portion thereof between a boundary surface of the active region and a boundary surface of the capacitor body includes two regions, and among two regions, a first cover region adjacent to the active region includes grains having a core-shell structure doped with Sn, and
the first cover region includes 20% or more of Sn-doped core-shell structure grains compared to the total of grains in the first cover region.

17. The board of claim 16 , where among the two regions, a second cover region adjacent to the boundary surface of the capacitor body includes grains that does not include Sn.

18. A multilayer capacitor comprising:
a capacitor body including an active region having dielectric layers and internal electrodes alternately stacked therein, the capacitor body including upper and lower covers disposed on upper and lower surfaces of the active region, respectively; and
an external electrode disposed on an external surface of the capacitor body,
wherein one of the upper and lower covers includes a first region adjacent to the active region and a second region adjacent to the boundary surface of the capacitor body,
the first region includes grains having a core-shell structure doped with more Sn than grains in the second region, and
an average size of the grains of the second region is greater than an average grain size of the grains of the first region.

19. The multilayer capacitor of claim 18 , wherein the grains included in the second region do not include Sn.

20. The multilayer capacitor of claim 18 , wherein the grains of the first region have a higher molar ratio of Ba/Ti than a molar ratio of grains of the active region.

21. The multilayer capacitor of claim 18 , wherein a grain of the second region is the same material as a material of a grain of the active region.

22. The multilayer capacitor of claim 18 , wherein an average grain size of the first region is 100 to 180 nm, and
an average grain size of the second region is 200 nm or more.

Assignees

• Samsung Electro Mech

Inventors

• Seo Chun Hee
• Jeong Jong Suk
• Kim Jin Woo
• Kim Tae Hyung
• Seo Jeong Wook
• Yoo Dong Geon
• Yoo Jong Hoon
• Kim Su Been

Classifications

• H05K2201/10015

  Non-printed capacitor · CPC title

• H01G4/005

  Electrodes · CPC title

• H01G4/30

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H05K1/111

  Pads for surface mounting, e.g. lay-out · CPC title

• H01G4/1218 Primary

  based on titanium oxides or titanates (H01G4/1245 takes precedence) · CPC title