Supporting binary translation alias detection in an out-of-order processor
US-2018095765-A1 · Apr 5, 2018 · US
US11650926B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11650926-B2 |
| Application number | US-202117370229-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 8, 2021 |
| Priority date | Feb 5, 2019 |
| Publication date | May 16, 2023 |
| Grant date | May 16, 2023 |
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A system and method of handling data access demands in a processor virtual cache that includes: determining if a virtual cache data access demand missed because of a difference in the context tag of the data access demand and a corresponding entry in the virtual cache with the same virtual address as the data access demand; in response to the virtual cache missing, determining whether the alias tag valid bit is set in the corresponding entry of the virtual cache; in response to the alias tag valid bit not being set, determining whether the virtual cache data access demand is a synonym of the corresponding entry in the virtual cache; and in response to the virtual access demand being a synonym of the corresponding entry in the virtual cache with the same virtual address but a different context tag, updating information in a tagged entry in an alias table.
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What is claimed is: 1. A non-transitory data storage medium comprising programming instructions that when executed by a processor cause the processor to: make a data access demand to a virtual cache having a plurality of entries; determine, in response to making a data access demand to the virtual cache, whether the data access demand misses in the virtual cache; determine, in response to the data access demand missing in the virtual cache, if the virtual cache data access demand missed because of a difference in a context tag of the data access demand and a context tag of a corresponding entry in the virtual cache with the same virtual address as the data access demand; determine, in response to the virtual cache missing because of a difference in the context tag of the data access demand and the corresponding entry in the virtual cache, whether an alias tag valid bit is set in the corresponding entry of the virtual cache; determine, in response to the alias tag valid bit not being set for the corresponding entry in the virtual cache with the matching virtual address of the data access demand but a different context tag, whether the virtual cache data access demand hits in physical memory with the translated real address and is a synonym of the corresponding entry in the virtual cache; and update, in response to the virtual access demand being a synonym of the corresponding entry in the virtual cache with the same virtual address but a different context tag, information in a tagged entry in an alias table referenced by the corresponding entry in the virtual cache. 2. The non-transitory data storage medium according to claim 1 , wherein updating information in the tagged entry in the alias table further includes programming instructions that when executed by the processor cause the processor to add to the alias table the virtual address of the virtual cache access demand and the translated real address of the synonym. 3. The non-transitory data storage medium according to claim 2 , further comprising programming instructions that when executed by the processor cause the processor to add a thread identification to the tagged entry in the alias table, wherein the thread identification identifies the thread making the virtual cache access demand. 4. The non-transitory data storage medium according to claim 1 , further comprising programming instructions that when executed by the processor cause the processor to determine, in response to the alias tag valid bit being set for the corresponding entry in the virtual cache with the matching virtual address of the access demand but a different context tag, if the thread making the data access demand to the virtual cache has permission to access the corresponding entry in the virtual cache. 5. The non-transitory data storage medium according to claim 4 , further comprising programming instructions that when executed by the processor cause the processor to check the tagged entry in the alias table referenced by an alias tag bit field in the corresponding entry in the virtual cache to determine if the thread making the data access demand to the virtual cache has permission to access that corresponding entry in the virtual cache. 6. The non-transitory data storage medium according to claim 4 , further comprising programming instructions that when executed by the processor cause the processor to provide, in response to the thread of the data access demand having permission to access the corresponding entry in the virtual cache, the data in that corresponding entry in the virtual cache. 7. The non-transitory data storage medium according to claim 4 , further comprising programming instructions that when executed by the processor cause the processor to: determine, in response to the thread of the access demand not having permission to access the corresponding entry in the virtual cache, whether the virtual cache data access demand hits in physical memory with the translated real address and is a synonym of the corresponding entry in the virtual cache; and update, in response to the virtual access demand being a synonym of the corresponding entry in the virtual cache with the same virtual address but a different context tag, the tagged entry in the alias table to grant permission to the thread of the data access demand. 8. The non-transitory data storage medium according to claim 4 , further comprising programming instructions that when executed by the processor cause the processor to, update, in response to the thread of the access demand not having permission to access the corresponding entry in the virtual cache, the tagged entry in the alias table to grant permission to the thread of the data access demand. 9. The non-transitory data storage medium according to claim 4 , further comprising programming instructions that when executed by the processor cause the processor to: set, in response to the thread of the data access demand not having permission to access the corresponding entry in the virtual cache, the alias tag valid bit in the corresponding entry in the virtual cache if not already set valid, and update the alias tag bit field in the corresponding entry in the virtual cache to reference the tagged entry in the alias table if not already set. 10. The non-transitory data storage medium according to claim 9 , wherein updating the alias tag bit field in the corresponding entry in the virtual cache further comprises programming instructions that when executed by the processor cause the processor to include setting the alias tag bit field in the corresponding entry in the virtual cache to match the tagged entry in the alias table. 11. The non-transitory data storage medium according to claim 1 , further comprising programming instructions that when executed by the processor cause the processor to update, in response to a virtual cache miss because of a synonym in the virtual cache, at least one of the virtual cache entries. 12. The non-transitory data storage medium according to claim 11 , wherein updating one or more entries in the virtual cache because of a synonym comprises programming instructions that when executed by the processor cause the processor to change the context tag of the corresponding entry in the virtual cache. 13. The non-transitory data storage medium according to claim 1 , further comprising programming instructions that when executed by the processor cause the processor to provide, in response to the virtual cache data access demand matching the virtual address and context tag in a virtual cache entry, the data in that matching virtual cache entry. 14. The non-transitory data storage medium according to claim 1 , further comprising programming instructions that when executed by the processor cause the processor to: determine whether there is room for an entry in the alias table, and in response to determining that there is no room in the alias table, evict an entry in the alias table and deactivate the alias tag valid bit field for the corresponding entry in the virtual cache. 15. A computing system comprising: a virtual cache having a plurality of entries having a virtual address and associated data, each entry in virtual cache having a bit field for the virtual address, a context tag, an alias tag valid, and an alias tag; an alias table for tracking the virtual address and translated real address of synonyms; and wherein the virtual cache is configured to: receive a data access demand to the virtual cache, and in response to the virtual cache receiving a data access demand to the virtual cache, the system is configured to: determine whether the d
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