Distributed hardware tracing

US11650895B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11650895-B2
Application numberUS-202117240838-A
CountryUS
Kind codeB2
Filing dateApr 26, 2021
Priority dateMar 29, 2017
Publication dateMay 16, 2023
Grant dateMay 16, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A computer-implemented method executed by one or more processors, the method includes monitoring execution of program code executed by a first processor component; and monitoring execution of program code executed by a second processor component. A computing system stores data identifying hardware events in a memory buffer. The stored events occur across processor units that include at least the first and second processor components. The hardware events each include an event time stamp and metadata characterizing the event. The system generates a data structure identifying the hardware events. The data structure arranges the events in a time ordered sequence and associates events with at least the first or second processor components. The system stores the data structure in a memory bank of a host device and uses the data structure to analyze performance of the program code executed by the first or second processor components.

First claim

Opening claim text (preview).

What is claimed is: 1. A method performed by a hardware tracing system for capturing event data describing hardware events, wherein the hardware tracing system comprises a plurality of hardware components, the method comprising: detecting, by a hardware component of the hardware tracing system, a trigger that triggers capturing of the event data describing the hardware events, wherein the trigger is satisfied as a result of executing a program code by at least one hardware component in the hardware tracing system; in response to detecting the trigger being satisfied, storing the event data in a storage medium of the hardware tracing system, wherein the event data comprises a timeline of the hardware events and is specific to hardware operations comprising a data transfer between one or more hardware components of the hardware tracing system through particular data paths; and providing, to a host, the event data for analyzing performance of the program code by the host. 2. The method of claim 1 , wherein the trigger is encoded as an embedded operand in the program code using a parameter value associated with a hardware component. 3. The method of claim 1 , wherein the hardware tracing system comprises a plurality of hardware performance counters, wherein storing the event data comprises: storing the event data at one of the plurality of hardware performance counters, wherein the stored event data comprises respective incremental parameter counts describing particular hardware events. 4. The method of claim 1 , wherein the event data comprises one or more trace points, wherein each of the one or more trace points is configured to generate a trace entry associated with a particular hardware event. 5. The method of claim 1 , wherein the trigger is associated with one or more trace bits, wherein at least one trace bit of the one or more trace bits is inserted into the program code by the host or dynamically determined by a particular hardware component in the hardware tracing system. 6. The method of claim 5 , wherein the one or more trace bits are configured to provide a mechanism to reduce an overall amount of event data being captured and stored in response to detecting the trigger being satisfied. 7. A hardware tracing system for capturing event data describing hardware events, the hardware tracing system comprising a plurality of hardware components that comprise: one or more processing devices; and one or more non-transitory machine-readable storage devices for storing instructions that are executable by the one or more processing devices to cause performance of operations comprising: detecting, by a hardware component of the hardware tracing system, a trigger that triggers capturing of the event data describing the hardware events, wherein the trigger is satisfied as a result of executing a program code by at least one hardware component in the hardware tracing system; in response to detecting the trigger being satisfied, storing the event data in a storage medium of the hardware tracing system, wherein the event data comprises a timeline of the hardware events and is specific to hardware operations comprising a data transfer between one or more hardware components of the hardware tracing system through particular data paths; and providing, to a host, the event data for analyzing performance of the program code by the host. 8. The hardware tracing system of claim 7 , wherein the trigger is encoded as an embedded operand in the program code using a parameter value associated with a hardware component. 9. The hardware tracing system of claim 7 , further comprising a plurality of hardware performance counters, wherein storing the event data comprises: storing the event data at one of the plurality of hardware performance counters, wherein the stored event data comprises respective incremental parameter counts describing particular hardware events. 10. The hardware tracing system of claim 7 , wherein the event data comprises one or more trace points, wherein each of the one or more trace points is configured to generate a trace entry associated with a particular hardware event. 11. The hardware tracing system of claim 7 , wherein the trigger is associated with one or more trace bits, wherein at least one trace bit of the one or more trace bits is inserted into the program code by the host or dynamically determined by a particular hardware component in the hardware tracing system. 12. The hardware tracing system of claim 11 , wherein the one or more trace bits are configured to provide a mechanism to reduce an overall amount of event data being captured and stored in response to detecting the trigger being satisfied. 13. The hardware tracing system of claim 7 , wherein the hardware tracing system further comprises a trace event filtering feature configured to reduce a number of trace entries to be generated by limiting a value of a trace bit. 14. One or more non-transitory machine-readable storage media for storing instructions used to capture event data describing hardware events in a hardware tracing system, wherein the hardware tracing system comprises a plurality of hardware components, the instructions being executable by one or more computers to cause performance of operations comprising: detecting, by a hardware component of the hardware tracing system, a trigger that triggers capturing of the event data describing the hardware events, wherein the trigger is satisfied as a result of executing a program code by at least one hardware component in the hardware tracing system; in response to detecting the trigger being satisfied, storing the event data in a storage medium of the hardware tracing system, wherein the event data comprises a timeline of the hardware events and is specific to hardware operations comprising a data transfer between one or more hardware components of the hardware tracing system through particular data paths; and providing, to a host, the event data for analyzing performance of the program code by the host. 15. The one or more non-transitory machine-readable storage media of claim 14 , wherein the trigger is encoded as an embedded operand in the program code using a parameter value associated with a hardware component. 16. The one or more non-transitory machine-readable storage media of claim 14 , wherein the hardware tracing system comprises a plurality of hardware performance counters, wherein storing the event data comprises: storing the event data at one of the plurality of hardware performance counters, wherein the stored event data comprises respective incremental parameter counts describing particular hardware events. 17. The one or more non-transitory machine-readable storage media of claim 14 , wherein the event data comprises one or more trace points, wherein each of the one or more trace points is configured to generate a trace entry associated with a particular hardware event. 18. The one or more non-transitory machine-readable storage media of claim 14 , wherein the trigger is associated with one or more trace bits, wherein at least one trace bit of the one or more trace bits is inserted into the program code by the host or dynamically determined by a particular hardware component in the hardware tracing system. 19. The one or more non-transitory machine-readable storage media of claim 18 , wherein the one or more trace bits are configured to provide a mechanism to reduce an overall amount of event data being captured and stored in response to detecting the trigger being satisfied.

Assignees

Inventors

Classifications

  • by tracing the execution of the program · CPC title

  • Monitoring of software · CPC title

  • for systems · CPC title

  • Data logging (G06F11/14, G06F11/2205 take precedence) · CPC title

  • using time information · CPC title

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Frequently asked questions

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What does patent US11650895B2 cover?
A computer-implemented method executed by one or more processors, the method includes monitoring execution of program code executed by a first processor component; and monitoring execution of program code executed by a second processor component. A computing system stores data identifying hardware events in a memory buffer. The stored events occur across processor units that include at least th…
Who is the assignee on this patent?
Google Llc
What technology area does this patent fall under?
Primary CPC classification G06F11/3636. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 16 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).