Test system and signal transmission circuit board thereof

Patent metadata

Field	Value
Publication number	US-11650245-B2
Application number	US-202117211017-A
Country	US
Kind code	B2
Filing date	Mar 24, 2021
Priority date	Mar 1, 2019
Publication date	May 16, 2023
Grant date	May 16, 2023

Abstract

A signal transmission circuit board includes a main body and a first connecting unit connected with the main body. The first connecting unit includes a test pin area and an avoidance area adjacent to the test pin area, and the avoidance area is free of test pins.

First claim

What is claimed is:

1. A signal transmission circuit board, comprising a main body and a first connecting unit connected with the main body,
wherein the first connecting unit comprises a test pin area and an avoidance area adjacent to the test pin area,
wherein the avoidance area is free of test pins, and
wherein an outer contour of the avoidance area comprises at least two adjacent line segments connected to each other, and the two adjacent line segments are transiently connected by a straight line.

2. The signal transmission circuit board according to claim 1 , wherein a thickness of the avoidance area is less than a thickness of the test pin area.

3. The signal transmission circuit board according to claim 2 , wherein the avoidance area is a groove.

4. The signal transmission circuit board according to claim 3 , wherein side walls of the groove are transited by curved surfaces, and the side walls of the groove and a bottom wall of groove are also transited by curved surfaces.

5. The signal transmission circuit board according to claim 1 , wherein the avoidance area is a void area.

6. The signal transmission circuit board according to claim 5 , wherein the test pin area comprises a first test pin area and a second test pin area, an end of the first test pin area away from the main body and an end of the second test pin area away from the main body are connected through a connector, and the void area is closed by the connector.

7. The signal transmission circuit board according to claim 5 , wherein the test pin area comprises a first test pin area and a second test pin area, an end of the first test pin area away from the main body and an end of the second test pin area away from the main body are not connected, and a shape of the void area is unclosed.

8. The signal transmission circuit board according to claim 1 , wherein the avoidance area is configured that in response to the first connecting unit being electrically connected with test pins of a display screen, the first connecting unit at least does not contact with a driving chip connecting unit of the display screen, or a force or pressure on the driving chip connecting unit is less than a threshold value in response to the first connecting unit contacting with the driving chip connecting unit.

9. The signal transmission circuit board according to claim 1 , wherein the avoidance area is configured that in response to the first connecting unit being electrically connected with test pins of a display screen, the avoidance area is located on an overlapping area between the first connecting unit and a driving chip connecting unit, and the avoiding area is arranged on the first connecting unit.

10. The signal transmission circuit board according to claim 1 , wherein the first connecting unit and the main body are integrated.

11. The signal transmission circuit board according to claim 1 , wherein the first connecting unit comprises three test pin areas, and positions of the three test pin areas are not collinear and form a triangular position relationship.

12. A test system, comprising a test device and a signal transmission circuit board configured to connect the test device and a display screen,
wherein the signal transmission circuit board comprises a main body and a first connecting unit connected with the main body,
wherein the first connecting unit comprises a test pin area and an avoidance area adjacent to the test pin area,
wherein the avoidance area is free of test pins, and
wherein an outer contour of the avoidance area comprises at least two adjacent line segments connected to each other, and the two adjacent line segments are transiently connected by a straight line.

13. The test system according to claim 12 , wherein a thickness of the avoidance area is less than a thickness of the test pin area.

14. The test system according to claim 12 , wherein the avoidance area is a void area.

15. The test system according to claim 12 , wherein the avoidance area is configured that in response to the first connecting unit being electrically connected with test pins of a display screen, the first connecting unit at least does not contact with a driving chip connecting unit of the display screen, or a force or pressure on the driving chip connecting unit is less than a threshold value in response to the first connecting unit contacting with the driving chip connecting unit.

16. The test system according to claim 12 , wherein the display screen is a flexible display screen or a hard display screen, the signal transmission circuit board is a flexible circuit board, the main body comprises a second connecting unit, and the second connecting unit is configured to connect the test device.

17. The test system according to claim 12 , wherein the avoidance area is configured that in response to the first connecting unit being electrically connected with test pins of a display screen, the avoidance area is located on an overlapping area between the first connecting unit and a driving chip connecting unit, and the avoiding area is arranged on the first connecting unit.

18. The test system according to claim 12 , wherein the first connecting unit comprises three test pin areas, and positions of the three test pin areas are not collinear and form a triangular position relationship.

Assignees

• Yungu Guan Tech Co Ltd

Inventors

• Huang Genmao
• Xu Gusheng
• Lin Li
• Yuan Bo
• Hu Siming

Classifications

• G01R31/00

  Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere ({measuring superconductive properties G01R33/1238;} testing line transmission systems H04B3/46; testing or measuring semiconductors or solid state devices during manufacture {H10P74/00}) · CPC title

• G01R1/0416

  Connectors, terminals (G01R1/0425 and G01R1/0433 take precedence; with measurement function for battery poles G01R31/364) · CPC title

• G01R1/02 Primary

  General constructional details · CPC title

• G01R31/2825 Primary

  in household appliances or professional audio/video equipment (testing LAN's H04L43/50; testing TV systems H04N17/00; testing loudspeakers H04R29/00) · CPC title