Semiconductor device

US11646368B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11646368-B2
Application numberUS-202117188974-A
CountryUS
Kind codeB2
Filing dateMar 1, 2021
Priority dateJul 22, 2020
Publication dateMay 9, 2023
Grant dateMay 9, 2023

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

According to one embodiment, a semiconductor device includes a supporter including a first surface, first, second, and third conductive parts, a semiconductor region, and an insulating part. A first direction from the first toward second conductive part is along the first surface. The semiconductor region includes first, second, and third partial regions. A second direction from the first toward second partial region is along the first surface and crosses the first direction. The third partial region is between the first partial region and the second conductive part in the first direction. The third partial region includes a counter surface facing the second conductive part. A direction from the counter surface toward the third conductive part is along the second direction. The insulating part includes an insulating region. At least a portion of the insulating region is between the counter surface and the third conductive part.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a supporter including a first surface; a first conductive part; a second conductive part, a first direction from the first conductive part toward the second conductive part being along the first surface; a first semiconductor region of a first conductivity type, the first semiconductor region including a first partial region, a second partial region, and a third partial region, a second direction from the first partial region toward the second partial region being along the first surface and crossing the first direction, the third partial region being between the first partial region and the second conductive part in the first direction, the third partial region including a counter surface facing the second conductive part, the third partial region and the second conductive part having a Schottky contact; a third conductive part, a direction from the counter surface toward the third conductive part being along the second direction; and a first insulating part including a first insulating region, at least a portion of the first insulating region being between the counter surface and the third conductive part, the first insulating region physically contacting the counter surface. 2. The device according to claim 1 , wherein a direction from a portion of the third partial region toward the third conductive part is along the second direction, and a direction from at least a portion of the second conductive part toward the third conductive part is along the second direction. 3. The device according to claim 1 , wherein the third partial region includes a first region and a second region, the first region is between the second region and the second conductive part in the first direction, and a concentration of an impurity of the first conductivity type in the first region is greater than a concentration of an impurity of the first conductivity type in the second region. 4. The device according to claim 1 , wherein the second conductive part includes a first conductive region and a second conductive region, the first conductive region is between the first partial region and the second conductive region in the first direction, the second conductive region includes a first element, the third partial region includes a second element, and the first conductive region includes a compound including the first and second elements. 5. The device according to claim 1 , wherein the second conductive part includes a first conductive region and a second conductive region, the first conductive region is between the third partial region and the second conductive region in the first direction, the second conductive region includes a first metallic element, the third partial region includes silicon, and the first conductive region includes a silicide including the first metallic element. 6. The device according to claim 1 , further comprising: a fourth conductive part, the first semiconductor region further including a fourth partial region, the second partial region being between the first partial region and the fourth partial region in the second direction, a direction from the fourth partial region toward the fourth conductive part being along the first direction, a direction from at least a portion of the third partial region toward the fourth conductive part being along the second direction, the first insulating part including a second insulating region, the second insulating region being between the fourth conductive part and the at least a portion of the third partial region in the second direction. 7. The device according to claim 6 , wherein the fourth conductive part is electrically connected to the second conductive part. 8. The device according to claim 6 , further comprising: a fifth conductive part, the second conductive part being between the third partial region and at least a portion of the fifth conductive part in the first direction, the fifth conductive part being electrically connected to the second and fourth conductive parts. 9. The device according to claim 8 , further comprising: a second insulating part, the third conductive part being between the second partial region and the fifth conductive part in the first direction, at least a portion of the second insulating part being between the third conductive part and at least a portion of the fifth conductive part in the first direction. 10. The device according to claim 8 , wherein the first conductive part is provided around the fifth conductive part in a plane including the first and second directions, a plurality of cells is provided between the fifth conductive part and the first conductive part, and one of the plurality of cells includes the second and third conductive parts. 11. The device according to claim 6 , comprising: a plurality of the second conductive parts; and a plurality of the fourth conductive parts, a position in the second direction of one of the plurality of second conductive parts and a position in the second direction of an other one of the plurality of second conductive parts being between a position in the second direction of one of the plurality of fourth conductive parts and a position in the second direction of an other one of the plurality of fourth conductive parts, the other one of the plurality of fourth conductive parts being next to the one of the plurality of fourth conductive parts. 12. The device according to claim 6 , wherein an impurity concentration of the first conductivity type in the fourth partial region is greater than an impurity concentration of the first conductivity type in the third partial region. 13. The device according to claim 1 , wherein the first semiconductor region includes a fifth partial region, the fifth partial region is provided between the first conductive part and the first partial region, and an impurity concentration of the first conductivity type in the fifth partial region is greater than an impurity concentration of the first conductivity type in the first partial region. 14. The device according to claim 1 , further comprising: a second semiconductor region of a second conductivity type, the second semiconductor region being between the second conductive part and a portion of the third partial region in the first direction, an other portion of the third partial region being between the second semiconductor region and the first insulating region in the second direction. 15. The device according to claim 1 , further comprising: a first member, the first semiconductor region further including a fourth partial region, the second partial region being between the first partial region and the fourth partial region in the second direction, a direction from the fourth partial region toward the first member being along the first direction, a direction from at least a portion of the third partial region toward the first member being along the second direction, the first insulating part including a second insulating region, the second insulating region being between the first member and the at least a portion of the third partial region in the second direction, the first member being electrically connected to the fourth partial region, the first member being electrically connected to the second conductive part or capable of being electrically connected to the second conductive part, a resistivity of the first member being greater than a resistivity of the fourth partial region and less than a resistivity of the second insulating region. 16. The device according to cl

Assignees

Inventors

Classifications

  • H10D64/117Primary

    Recessed field plates, e.g. trench field plates or buried field plates · CPC title

  • comprising multiple field plate segments · CPC title

  • Body regions of DMOS transistors or IGBTs  (cell layout of DMOS H10D62/127) · CPC title

  • of IGFETs · CPC title

  • of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11646368B2 cover?
According to one embodiment, a semiconductor device includes a supporter including a first surface, first, second, and third conductive parts, a semiconductor region, and an insulating part. A first direction from the first toward second conductive part is along the first surface. The semiconductor region includes first, second, and third partial regions. A second direction from the first towar…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10D64/117. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 09 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).