Semiconductor device with graded drift region

US9525059B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9525059-B1
Application numberUS-201615059271-A
CountryUS
Kind codeB1
Filing dateMar 2, 2016
Priority dateSep 11, 2015
Publication dateDec 20, 2016
Grant dateDec 20, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a semiconductor layer that has a first surface and a second surface, a drift region of a first conductivity type in the semiconductor layer, a body region of a second conductivity type between the drift region and the first surface, a source region of first conductivity type, a first gate electrode, a second gate electrode with the body region interposed between the first gate electrode and the second gate electrode, first and second gate insulating films, a first field plate electrode between the second surface and the first gate electrode, a second field plate electrode between the second surface and the second gate electrode, a first region of the first conductivity type in the drift region, a second region between the first region and the body region, and a third region between the second region and the body region.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a semiconductor layer that has a first surface and a second surface; a drift region of a first conductivity type in the semiconductor layer; a body region of a second conductivity type in the semiconductor layer between the drift region and the first surface; a source region of the first conductivity type in the semiconductor layer between the body region and the first surface; a first gate electrode; a second gate electrode, the body region being between the first gate electrode and the second gate electrode; a first gate insulating film between the first gate electrode and the body region; a second gate insulating film between the second gate electrode and the body region; a first field plate electrode between the second surface and the first gate electrode; a second field plate electrode between the second surface and the second gate electrode; a first field plate insulating film between the first field plate electrode and the drift region; a second field plate insulating film between the second field plate electrode and the drift region; a first region of the drift region having at least a portion between the first field plate electrode and the second field plate electrode; a second region of the drift region between the first region and the body region, having an impurity concentration of the first conductivity type that is higher than an impurity concentration of the first conductivity type in the first region; and a third region of the drift region between the second region and the body region, having an impurity concentration of the first conductivity type that is lower than the impurity concentration of the first conductivity type in the second region. 2. The semiconductor device according to claim 1 , wherein the impurity concentration of the first conductivity type in the second region is higher than or equal to 1.5 times the impurity concentration of the first conductivity type in the first region. 3. The semiconductor device according to claim 1 , wherein the second region is between the first field plate and the second field plate. 4. The semiconductor device according to claim 1 , wherein a position at which the impurity concentration of the first conductivity type in the second region is at a maximum that is between two surfaces which are obtained by equally dividing a region between a surface parallel with the second surface and including an end portion on the second surface side of the first field plate, and a surface parallel with the second surface and including a boundary between the drift region and body region, into three regions. 5. The semiconductor device according to claim 1 , further comprising: a first insulating film between the first gate electrode and the first field plate electrode; and a second insulating film between the second gate electrode and the second field plate electrode. 6. The semiconductor device according to claim 1 , wherein the impurity concentration of the first conductivity type in the first region is substantially the same as the impurity concentration of the first conductivity type in the third region. 7. The semiconductor device according to claim 1 , further comprising: a source electrode on the first surface and is electrically coupled to the source region; and a drain electrode on the second surface and is electrically coupled to the drift region. 8. The semiconductor device according to claim 1 , wherein the semiconductor layer is silicon. 9. The semiconductor device according to claim 7 , further comprising a drain region of the first conductivity type between the drift region and the drain electrode. 10. A semiconductor device, comprising: a semiconductor layer having a first surface and a second surface; a drift region of a first conductivity type in the semiconductor layer; a body region of a second conductivity type in the semiconductor layer between the drift region and the first surface; a source region of the first conductivity type in the semiconductor layer between the body region and the first surface; a first gate electrode; a second gate electrode, the body region being between the first gate electrode and the second gate electrode; a first gate insulating film between the first gate electrode and the body region; a second gate insulating film between the second gate electrode and the body region; a first field plate electrode between the second surface and the first gate electrode; a second field plate electrode between the second surface and the second gate electrode; a first field plate insulating film between the first field plate electrode and the drift region; a second field plate insulating film between the second field plate electrode and the drift region; a first region of the drift region having at least a portion between the first field plate electrode and the second field plate electrode; a second region of the drift region between the first region and the body region, and having an impurity concentration of the first conductivity type that is higher than an impurity concentration of the first conductivity type in the first region; a third region of the drift region between the second region and the body region, and having an impurity concentration of the first conductivity type that is lower than the impurity concentration of the first conductivity type in the second region; a source electrode on the first surface and electrically coupled to the source region; a drain electrode on the second surface and electrically coupled to the drift region; and a drain region of the first conductivity type between the drift region and the drain electrode. 11. The semiconductor device according to claim 10 , wherein the impurity concentration of the first conductivity type in the second region is higher than or equal to 1.5 times the impurity concentration of the first conductivity type in the first region. 12. The semiconductor device according to claim 11 , wherein the second region is between the first field plate and the second field plate. 13. The semiconductor device according to claim 10 , wherein a position in which the impurity concentration of the first conductivity type of the second region is the maximum is placed between two surfaces which are obtained by equally dividing a region between a surface parallel with the second surface and including an end portion on the second surface side of the first field plate, and a surface parallel with the second surface and including a boundary between the drift region and body region, into three regions. 14. The semiconductor device according to claim 13 , further comprising: a first insulating film between the first gate electrode and the first field plate electrode; and a second insulating film between the second gate electrode and the second field plate electrode. 15. The semiconductor device according to claim 10 , wherein the impurity concentration of the first conductivity type in the first region is substantially the same as the impurity concentration of the first conductivity type in the third region. 16. The semiconductor device according to claim 15 , wherein the semiconductor layer is single crystal silicon. 17. The semiconductor device according to claim 10 , wherein the first gate electrode and the first field plate electrode are in a trench in the semiconductor layer. 18. A semiconductor device, comprising: a single crystal semiconductor layer that has a first surface and a second surface; a drift region of a f

Assignees

Inventors

Classifications

  • the thicknesses being non-uniform · CPC title

  • Recessed field plates, e.g. trench field plates or buried field plates · CPC title

  • Impurity concentrations or distributions · CPC title

  • H10D30/668Primary

    having trench gate electrodes, e.g. UMOS transistors · CPC title

  • H10D64/112Primary

    comprising multiple field plate segments · CPC title

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What does patent US9525059B1 cover?
A semiconductor device includes a semiconductor layer that has a first surface and a second surface, a drift region of a first conductivity type in the semiconductor layer, a body region of a second conductivity type between the drift region and the first surface, a source region of first conductivity type, a first gate electrode, a second gate electrode with the body region interposed between …
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10D30/668. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).