Method of manufacturing a double-sided laminate including dry milling a conductive trace pattern and providing a cover layer with precut access holes that expose the trace pattern

US11617270B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11617270-B2
Application numberUS-202016822688-A
CountryUS
Kind codeB2
Filing dateMar 18, 2020
Priority dateSep 24, 2019
Publication dateMar 28, 2023
Grant dateMar 28, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for manufacturing a double-sided, single conductor laminate includes providing a laminated substrate that includes a conductive layer, an adhesive layer and a support layer; dry milling a trace pattern in the laminated substrate by removing selected areas of the conductive layer and the adhesive layer; and attaching a first cover layer using a first adhesive layer to the conductive layer. The first cover layer includes one or more precut access holes that align with one or more traces of the trace pattern.

First claim

Opening claim text (preview).

What is claimed is: 1. Method for manufacturing a double-sided, single conductor laminate, comprising: providing a laminated substrate that includes a conductive layer, an adhesive layer and a support layer; dry miffing a trace pattern in the laminated substrate by removing selected areas of the conductive layer and the adhesive layer; and attaching a first cover layer using a first adhesive layer to the conductive layer, wherein the first cover layer includes one or more precut access holes that align with one or more traces of the trace pattern. 2. The method of claim 1 , wherein the first cover layer further includes a second adhesive layer on a side thereof opposite to the first adhesive layer. 3. The method of claim 1 , further comprising removing the support layer. 4. The method of claim 3 , further comprising thinning the conductive layer using dry milling. 5. The method of claim 3 , further comprising attaching a second cover layer with a third adhesive layer to the conductive layer. 6. The method of claim 5 , wherein the second cover layer includes a fourth adhesive layer on a side thereof opposite to the third adhesive layer. 7. The method of claim 5 , further comprising spraying adhesive layers onto outer surfaces of the laminated substrate. 8. The method of claim 1 , wherein the conductive layer comprises a material selected from a group consisting of copper and aluminum. 9. The method of claim 1 , wherein the support layer comprises a material selected from a group consisting of polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyimide (PI). 10. The method of claim 1 , wherein the laminated substrate comprises a continuous web. 11. The method of claim 1 wherein the dry milling comprises removing the selected areas of the conductive layer and the adhesive layer using a cliché including a pattern with raised portions for pushing the laminated substrate into a milling wheel and non-raised portions for defining the trace pattern. 12. A method for manufacturing a double-sided, single conductor laminate, comprising: providing a laminated substrate that includes a conductive layer, an adhesive layer and a support layer; dry milling a trace pattern in the laminated substrate by removing selected areas of the conductive layer and the adhesive layer; and attaching a first cover layer using a first adhesive layer to the conductive layer, wherein the first cover layer includes one or more precut access holes. 13. The method of claim 12 , further comprising creating one or more access holes in the support layer to access one or more traces defined by the conductive layer. 14. The method of claim 13 , wherein creating the access holes in the support layer includes dry milling the access holes. 15. The method of claim 13 , wherein creating the access holes in the support layer includes fly cutting the access holes. 16. The method of claim 13 , wherein creating the access holes in the support layer includes laser ablating the access holes. 17. The method of claim 12 , further comprising spraying adhesive layers onto outer surfaces of the laminated substrate. 18. The method of claim 12 , wherein the conductive layer comprises a material selected from a group consisting of copper and aluminum. 19. The method of claim 12 , wherein the support layer comprises a material selected from a group consisting of polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyimide (PI). 20. The method of claim 12 , wherein the laminated substrate comprises a continuous web. 21. The method of claim 12 , wherein the first cover layer further includes a second adhesive layer on a side thereof to the first adhesive layer.

Assignees

Inventors

Classifications

  • of preperforated insulating layer · CPC title

  • by affixing prefabricated conductor pattern {(H05K1/187, H05K3/046, H05K3/4658, H05K3/4682 takes precedence)} · CPC title

  • Lands, clearance holes or other lay-out details concerning the surrounding of a via · CPC title

  • Flexible materials (H05K1/038 takes precedence; specific organic compositions are classified in H05K1/0313 and subgroups) · CPC title

  • Through-connections; Vertical interconnect access [VIA] connections (H05K3/403, H05K3/42 take precedence) · CPC title

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What does patent US11617270B2 cover?
A method for manufacturing a double-sided, single conductor laminate includes providing a laminated substrate that includes a conductive layer, an adhesive layer and a support layer; dry milling a trace pattern in the laminated substrate by removing selected areas of the conductive layer and the adhesive layer; and attaching a first cover layer using a first adhesive layer to the conductive lay…
Who is the assignee on this patent?
Gentherm Inc, Gentherm Inc
What technology area does this patent fall under?
Primary CPC classification H05K3/043. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 28 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).