Fab management with dynamic sampling plans, optimized wafer measurement paths and optimized wafer transport, using quantum computing

US11615974B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11615974-B2
Application numberUS-201916483599-A
CountryUS
Kind codeB2
Filing dateJul 5, 2019
Priority dateJul 5, 2019
Publication dateMar 28, 2023
Grant dateMar 28, 2023

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Abstract

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Systems and methods of optimizing wafer transport and metrology measurements in a fab are provided. Methods comprise deriving and updating dynamic sampling plans that provide wafer-specific measurement sites and conditions, deriving optimized wafer measurement paths for metrology measurements of the wafers that correspond to the dynamic sampling plan, managing FOUP (Front Opening Unified Pod) transport through the fab, transporting wafers to measurement tools while providing the dynamic sampling plans and the wafer measurement paths to the respective measurement tools before or as the FOUPs with the respective wafers are transported thereto, and carrying out metrology and/or inspection measurements of the respective wafers by the respective measurement tools according to the derived wafer measurement paths. Quantum computing resources may be used to solve the corresponding specific optimization problems, to reduce the required time, improve the calculated solutions and improve the fab yield and accuracy of the produced wafers.

First claim

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What is claimed is: 1. A system for optimizing wafer transport and metrology measurements in a semiconductor fabrication plant (fab), the system comprising: at least one processor configured to: derive and update dynamic sampling plans that provide wafer-specific measurement sites and conditions, wherein the dynamic sampling plans differ between wafers, derive optimized wafer measurement paths for metrology measurements of the wafers that correspond to the respective derived and updated dynamic sampling plan, and manage Front Opening Unified Pod (FOUP) transport through the fab, transporting wafers to measurement tools while providing the optimized wafer measurement paths to the respective measurement tools before or as the FOUPs with the respective wafers are transported thereto, wherein the respective measurement tools are metrology tools or inspection tools configured to carry out metrology and/or inspection measurements of the respective wafers according to the derived optimized wafer measurement paths, and wherein the processor comprises at least one quantum computer. 2. The system of claim 1 , wherein the deriving and updating the dynamic sampling plan is associated with a dedicated processor configured to carry out the optimization of the dynamic sampling plan, wherein the dedicated processor comprises at least one quantum computer. 3. The system of claim 1 , wherein the deriving the optimized wafer measurement paths is associated with a dedicated processor configured to carry out the optimization of the wafer measurement path, wherein the dedicated processor comprises at least one quantum computer. 4. The system of claim 3 , wherein the deriving optimized wafer measurement paths is configured to optimize the wafer measurement path with respect to wafer measurement speed and according to a given measurement time specified by the dynamic sampling plan. 5. The system of claim 1 , wherein the measurement tools comprise at least one stepwise operating metrology tool and at least one scanning metrology tool, the processor is further configured to co-optimize the dynamic sampling plan and the wafer measurement paths with respect to an allocation of stepping and the scanning metrology tools, to such that the dynamic sampling plan and the wafer measurement paths have a lowest wafer measurement time, wherein the scanning metrology tools are allocated to measure stretches of adjacent wafer sites. 6. The system of claim 1 , wherein the managing the FOUP transport is associated with a dedicated processor configured to carry out the optimization of the FOUP transport, wherein the dedicated processor comprises at least one quantum computer. 7. The system of claim 1 , wherein the processor is further configured to: apply big data analysis procedures to analyze the metrology and/or inspection measurements; update the dynamic sampling plan according to the analyzed metrology and/or inspection measurements. 8. The system of claim 7 , wherein the applying the big data analysis procedures and the updating the dynamic sampling plan is associated with a dedicated processor, wherein the dedicated processor comprises at least one quantum computer. 9. The system of claim 1 , further comprising a system controller configured to receive reports and log files from process tools and/or control the wafer transport and metrology measurements optimization in the fab. 10. The system of claim 9 , wherein the system controller comprises at least one of: a centralized quantum computer, a network of quantum computers, a network of co-optimized quantum and classical computers and/or a network service comprising any thereof. 11. A system for optimizing wafer transport and metrology measurements in a semiconductor fabrication plant (fab), the system comprising: at least one processor configured to: derive and update dynamic sampling plans that provide wafer-specific measurement sites and conditions, wherein the dynamic sampling plans differ between wafers, and manage Front Opening Unified Pod (FOUP) transport through the fab, transporting wafers to measurement tools while providing the dynamic sampling plans to the respective measurement tools before or as the FOUPs with the respective wafers are transported thereto, wherein the measurement tools are metrology tools or inspection tools, wherein the respective measurement tools are configured to carry out metrology and/or inspection measurements of the respective wafers according to the provided dynamic sampling plans, and wherein the processor comprises at least one quantum computer. 12. The system of claim 11 , wherein the deriving and updating the dynamic sampling plans is associated with a dedicated processor configured to carry out the optimization of the dynamic sampling plans, wherein the dedicated processor comprises at least one quantum computer. 13. The system of claim 11 , wherein the processor is further configured to support, computationally, the respective measurement tools in their derivation of optimized wafer measurement paths for metrology measurements from the respective derived and updated dynamic sampling plan. 14. The system of claim 11 , wherein the measurement tools comprise at least one stepwise operating metrology tool and at least one scanning metrology tool, the processor is further configured to co-optimize the dynamic sampling plan and the wafer measurement paths with respect to an allocation of stepping and the scanning metrology tools, such that the dynamic sampling plan and the wafer measurement paths have a lowest wafer measurement time, wherein the scanning metrology tools are allocated to measure stretches of adjacent wafer sites. 15. The system of claim 11 , wherein the managing FOUP transport is associated with a dedicated processor configured to carry out the optimization of the FOUP transport, wherein the dedicated processor comprises at least one quantum computer. 16. The system of claim 11 , wherein the processor is further configured to: apply big data analysis procedures to analyze the metrology and/or inspection measurements; and update the dynamic sampling plan according to the analyzed metrology and/or inspection measurements. 17. The system of claim 16 , wherein the applying the big data analysis procedures and the updating the dynamic sampling plan is associated with a dedicated processor configured to carry out the big data analysis. 18. The system of claim 11 , further comprising a system controller configured to receive reports and log files from process tools and/or control the wafer transport and metrology measurements optimization in the fab. 19. The system of claim 18 , wherein the system controller comprises at least one of: a centralized quantum computer, a network of quantum computers, a network of co-optimized quantum and classical computers and/or a network service comprising any thereof. 20. A system for optimizing wafer transport and metrology measurements in a semiconductor fabrication plant (fab), the system comprising: at least one processor configured to: derive optimized wafer measurement paths for metrology measurements of the wafers according to dynamic sampling plans that provide wafer-specific measurement sites and conditions and differ between wafers, and manage Front Opening Unified Pod (FOUP) transport through the fab, transporting wafers to measurement tools while providing the derived wafer measurement paths to the respective measurement tools before or as the FOUPs with the respective wafers are transpor

Assignees

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Classifications

  • Process monitoring, e.g. flow or thickness monitoring · CPC title

  • Production flow monitoring, e.g. for increasing throughput · CPC title

  • Quantum computing, i.e. information processing based on quantum-mechanical phenomena · CPC title

  • Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS] · CPC title

  • Calculate optimum path for conveying workpieces · CPC title

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What does patent US11615974B2 cover?
Systems and methods of optimizing wafer transport and metrology measurements in a fab are provided. Methods comprise deriving and updating dynamic sampling plans that provide wafer-specific measurement sites and conditions, deriving optimized wafer measurement paths for metrology measurements of the wafers that correspond to the dynamic sampling plan, managing FOUP (Front Opening Unified Pod) t…
Who is the assignee on this patent?
Kla Corp
What technology area does this patent fall under?
Primary CPC classification H10P72/0612. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 28 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).