Audio data processing circuit and processing method thereof

Patent metadata

Field	Value
Publication number	US-11614914-B2
Application number	US-202017107220-A
Country	US
Kind code	B2
Filing date	Nov 30, 2020
Priority date	Dec 5, 2019
Publication date	Mar 28, 2023
Grant date	Mar 28, 2023

Abstract

The present disclosure provides an audio data processing circuit and an audio data processing method. The audio data processing circuit includes a word select interface, a clock signal interface and an audio data interface. The word select interface is configured to receive a word select signal. The clock signal interface is configured to receive a clock signal, and generating an audio data interface signal according to a number of clocks of the clock signal in one period of the word select signal. The audio data interface is configured to transmit the audio data to a processing unit through a first transmission protocol or a second transmission protocol.

First claim

What is claimed is:

1. An audio data processing circuit configured to transmit audio data to a processing unit, comprising:
a word select interface configured to receive a word select signal of the processing unit;
a clock signal interface configured to receive a clock signal of the processing unit;
an audio data interface configured to transmit the audio data to the processing unit through a first transmission protocol or a second transmission protocol;
a first logic unit configured to generate an audio data interface signal according to the word select signal and a channel selection signal; and
a second logic unit configured to calculate a number of clocks of the clock signal in one period of the word select signal;
wherein the audio data processing circuit determines to transmit the audio data through the first transmission protocol or the second transmission protocol according to the audio data interface signal and the number of clocks of the clock signal.

2. The audio data processing circuit as claimed in claim 1 , comprising:
a counter configured to count the number of clocks of the clock signal.

3. The audio data processing circuit as claimed in claim 1 , wherein a bit depth of the audio data is 32 bits.

4. The audio data processing circuit as claimed in claim 1 , wherein the first transmission protocol is an inter-IC sound protocol, and the second transmission protocol is a time division multiplexing protocol.

5. The audio data processing circuit as claimed in claim 4 , wherein when the number of clocks of the clock signal in one period of the word select signal is more than 64, the audio data is transmitted to the processing unit through the second transmission protocol.

6. An audio data processing method for transmitting an audio data to a processing unit, comprising:
step 1: detecting a word select signal of the processing unit;
step 2: determining whether a number of clocks of a clock signal in one period of the word select signal is 64 and going to step 3 if the number of clocks of the clock signal in one period of the word select signal is 64, else going to step 4;
step 3: sending the audio data to the processing unit through a first transmission protocol; and
step 4: sending the audio data to the processing unit through a second transmission protocol;
wherein the step 2 further comprises generating an audio data interface signal according to a channel selection signal and the word select signal by a first logic unit of the processing unit and transmitting the audio data to the processing unit through the first transmission protocol or the second transmission protocol according to the audio data interface signal, and determining a number of channels of the audio data according to the period of the word select signal by a second logic unit of the processing unit;
wherein the audio data processing circuit determines to transmit the audio data through the first transmission protocol or the second transmission protocol according to the audio data interface signal and the number of clocks of the clock signal.

7. The audio data processing method as claimed in claim 6 , wherein a bit depth of the audio data is 32 bits.

8. The audio data processing method as claimed in claim 6 , wherein the step 2 further comprises calculating the number of clocks of the clock signal in one period of the word select signal by a counter of the processing unit, and determining whether the number of clocks of the clock signal in one period of the word select signal is 64.

Assignees

• Silicon Integrated Systems Corp

Inventors

• Chen Han-Ning

Classifications

• G06F3/162 Primary

  Interface to dedicated audio devices, e.g. audio drivers, interface to CODECs · CPC title

• G06F1/04

  Generating or distributing clock signals or signals derived directly therefrom · CPC title