Display motherboard and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-11609618-B2
Application number	US-201916955632-A
Country	US
Kind code	B2
Filing date	Jun 10, 2019
Priority date	Jun 11, 2018
Publication date	Mar 21, 2023
Grant date	Mar 21, 2023

Abstract

A display motherboard and a manufacturing method thereof are provided. The display motherboard includes a first substrate and a second substrate that are assembled, a plurality of mutually independent display devices located between the first substrate and the second substrate, a first seal, and a second seal. The first seal is provided in a peripheral area of the display motherboard, the second seal is provided in a cutting area of the display motherboard, the cutting area is located around each of the display devices, and the second seal surrounds at least one of the display devices.

First claim

What is claimed is:

1. A display motherboard, comprising a first substrate and a second substrate that are assembled, a plurality of mutually independent display devices located between the first substrate and the second substrate, a first seal, a second seal, and a blocking pattern located in a cutting area of the display motherboard,
wherein the first seal is provided in a peripheral area of the display motherboard, the second seal is provided in the cutting area of the display motherboard, the cutting area is located around each of the display devices, and the second seal surrounds at least one of the display devices,
wherein the blocking pattern forms a sealing area in the cutting area, the second seal is formed in the sealing area, and an orthographic projection of the sealing area onto the first substrate and an orthographic projection of a cut line in the cutting area onto the first substrate do not overlap,
wherein the blocking pattern is arranged on both sides of the second seal.

2. The display motherboard according to claim 1 , wherein an orthographic projection of the blocking pattern onto the first substrate and the orthographic projection of the cut line in the cutting area onto the first substrate do not overlap.

3. The display motherboard according to claim 1 , wherein the blocking pattern comprises a first wall-like sub-pattern and a second wall-like sub-pattern, and the sealing area is formed between the first wall-like sub-pattern and the second wall-like sub-pattern.

4. The display motherboard according to claim 1 , wherein the blocking pattern comprises a plurality of mutually independent spacers, and the sealing area is formed between the plurality of spacers.

5. The display motherboard according to claim 4 , wherein each of the display devices comprises at least one first spacer, and the plurality of mutually independent spacers and the at least one first spacer are provided in a same layer and are made of a same material.

6. The display motherboard according to claim 4 , wherein every two adjacent spacers of the plurality of mutually independent spacers have a same spacing distance.

7. The display motherboard according to claim 1 , wherein the cut line in the cutting area comprises first cut lines and stick cut lines, the first cut lines correspond to the display devices in a one-to-one manner and surround corresponding display devices respectively, each of the stick cut lines is located between adjacent first cut lines of the first cut lines and extends in a direction parallel to a side of the first cut lines, and the sealing area is located between the first cut lines and the stick cut lines.

8. The display motherboard according to claim 7 , wherein the sealing area is provided between the first cut lines and the stick cut lines.

9. The display motherboard according to claim 1 , wherein a width of the cutting area in a direction perpendicular to the cut line is greater than or equal to 7.2 mm, and a width of the second seal in the direction perpendicular to the cut line is less than or equal to 2.6 mm.

10. The display motherboard according to claim 1 , wherein each of the display devices comprises at least one functional film layer and a cell seal surrounding the at least one functional film layer, and the cell seal is provided in an encapsulating area of each of the display devices.

11. The display motherboard according to claim 1 , wherein each of the display devices is an organic light-emitting diode (OLED) display device.

12. A manufacturing method of the display motherboard according to claim 1 , comprising:
providing a first substrate and a second substrate, wherein a plurality of mutually independent display devices are formed on the first substrate;
forming a first seal in a peripheral area of the first substrate;
forming a blocking pattern in the cutting area, wherein the display motherboard further comprises the blocking pattern, the blocking pattern forms a sealing area in the cutting area, the second seal is formed in the sealing area, and an orthographic projection of the sealing area onto the first substrate and an orthographic projection of a cut line in the cutting area onto the first substrate do not overlap;
forming a second seal in a cutting area around at least one of the display devices, wherein the second seal surrounds the at least one of the display devices; and
assembling the first substrate and the second substrate.

13. The manufacturing method according to claim 12 , wherein the forming the second seal in the cutting area around the at least one of the display devices further comprises:
forming the second seal in the sealing area.

14. The manufacturing method according to claim 13 , wherein the forming the blocking pattern in the cutting area comprises:
forming a first wall-like sub-pattern and a second wall-like sub-pattern in the cutting area, wherein the sealing area is formed between the first wall-like sub-pattern and the second wall-like sub-pattern.

15. The manufacturing method according to claim 13 , wherein the forming the blocking pattern in the cutting area comprises:
forming a plurality of mutually independent spacers in the cutting area, wherein the sealing area is formed between the plurality of mutually independent spacers.

Assignees

• Ordos Yuansheng Optoelectronics Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Zhang Xueyong
• Ruan Shixin
• Wang Wu
• Yang Xiaocui

Classifications

• H10K59/8723

  Vertical spacers, e.g. arranged between the sealing arrangement and the OLED · CPC title

• G06F1/184 Primary

  Mounting of motherboards · CPC title

• H10K59/8722 Primary

  Peripheral sealing arrangements, e.g. adhesives, sealants · CPC title

• H10K71/50

  Forming devices by joining two substrates together, e.g. lamination techniques · CPC title

• H10K71/00

  Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title