Semiconductor chip with local oscillator buffer reused for loop-back test and associated loop-back test method

Patent metadata

Field	Value
Publication number	US-11601147-B2
Application number	US-202117504491-A
Country	US
Kind code	B2
Filing date	Oct 18, 2021
Priority date	Oct 30, 2020
Publication date	Mar 7, 2023
Grant date	Mar 7, 2023

Abstract

A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.

First claim

What is claimed is:

1. A semiconductor chip comprising:
a first wireless communication circuit, comprising a signal path, wherein the signal path comprises a mixer input port and a signal node distinct from the mixer input port, and further comprises a balanced-to-unbalanced (balun) circuit; and the signal node is an ungrounded terminal on an unbalanced side of the balun circuit;
a local oscillator (LO) buffer, arranged to receive and buffer an LO signal; and
an auxiliary path, arranged to electrically connect the LO buffer to the signal node of the signal path, wherein the LO buffer is reused for a loop-back test function of the first wireless communication circuit through the auxiliary path.

2. The semiconductor chip of claim 1 , wherein the first wireless communication circuit is a part of a receive (RX) circuit, the signal path is an RX signal path, and the LO buffer is reused for loop-back test of the RX circuit through the auxiliary path.

3. The semiconductor chip of claim 2 , wherein the LO buffer is an RX LO buffer of the RX circuit and is further coupled to the mixer input port.

4. The semiconductor chip of claim 3 , wherein the RX circuit belongs to a Radio Detection and Ranging (RADAR) system.

5. The semiconductor chip of claim 2 , further comprising:
a second wireless communication circuit, comprising the LO buffer.

6. The semiconductor chip of claim 5 , wherein the second wireless communication circuit is a part of an RX circuit, and the LO buffer is an RX LO buffer of the second wireless communication circuit.

7. The semiconductor chip of claim 6 , wherein the first wireless communication circuit and the second wireless communication circuit belong to a same wireless communication system.

8. The semiconductor chip of claim 7 , wherein the same wireless communication system is a Radio Detection and Ranging (RADAR) system.

9. The semiconductor chip of claim 6 , wherein the first wireless communication circuit and the second wireless communication circuit belong to different wireless communication systems.

10. The semiconductor chip of claim 9 , wherein the different wireless communication systems comprise a Radio Detection and Ranging (RADAR) system.

11. The semiconductor chip of claim 5 , wherein the second wireless communication circuit is a part of a transmitter (TX) circuit, and the LO buffer is a TX LO buffer of the second wireless communication circuit.

12. The semiconductor chip of claim 11 , wherein the first wireless communication circuit and the second wireless communication circuit belong to a same wireless communication system.

13. The semiconductor chip of claim 12 , wherein the same wireless communication system is a Radio Detection and Ranging (RADAR) system.

14. The semiconductor chip of claim 11 , wherein the first wireless communication circuit and the second wireless communication circuit belong to different wireless communication systems.

15. The semiconductor chip of claim 14 , wherein the different wireless communication systems comprise a Radio Detection and Ranging (RADAR) system.

16. The semiconductor chip of claim 1 , wherein the auxiliary path comprises:
a P-type metal-oxide-semiconductor (PMOS) based amplifier, where the balun circuit is reused as an output load of the PMOS based amplifier when the PMOS based amplifier is enabled to drive the signal node according to an output signal of the LO buffer.

17. The semiconductor chip of claim 1 , wherein the LO buffer is equipped with a mixer function.

18. A loop-back test method comprising:
electrically connecting, by an auxiliary path, a local oscillator (LO) buffer that is arranged to receive and buffer an LO signal to a signal node of a signal path in a wireless communication circuit, wherein the signal path further comprises a mixer input port that is distinct from the signal node; the wireless communication circuit comprises a balanced-to-unbalanced (balun) circuit; and the signal node is an ungrounded terminal on an unbalanced side of the balun circuit; and
reusing the LO buffer for a loop-back test function of the wireless communication circuit through the auxiliary path.

19. The loop-back test method of claim 18 , wherein the wireless communication circuit is a part of a receive (RX) circuit, the signal path is an RX signal path, and the LO buffer is reused for loop-back test of the RX circuit through the auxiliary path.

Assignees

• Mediatek Inc

Inventors

• Hsu Jui-Lin
• Chu Hsiang-Yun
• Chen Yen-Tso
• Cheng Jen-Hao
• Hsu Wei-Hsiu
• Lin Tzu-Chin
• Hung Chih-Ming
• Zhan Jing-Hong Conan

Classifications

• H04L43/50

  Testing arrangements · CPC title

• H01P5/10

  for coupling balanced lines or devices with unbalanced lines or devices · CPC title

• H03H7/42

  Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns · CPC title

• H04B2001/307

  using n-port mixer · CPC title

• H04B17/14

  of the whole transmission and reception path, e.g. self-test loop-back · CPC title