Dimension measurement apparatus, dimension measurement program, and semiconductor manufacturing system

US11600536B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11600536-B2
Application numberUS-201916957480-A
CountryUS
Kind codeB2
Filing dateJul 4, 2019
Priority dateJul 4, 2019
Publication dateMar 7, 2023
Grant dateMar 7, 2023

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Abstract

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The disclosure relates to a dimension measurement apparatus that reduces time required for dimension measurement and eliminates errors caused by an operator. Therefore, the dimension measurement apparatus uses a first image recognition model that extracts a boundary line between a processed structure and a background over the entire cross-sectional image and/or a boundary line of an interface between different kinds of materials, and a second image recognition that output information for dividing the boundary line extending over the entire cross-sectional image obtained from the first image recognition model for each unit pattern constituting a repetitive pattern, obtains coordinates of a plurality of feature points defined in advance for each unit pattern, and measures a dimension defined as a distance between two predetermined points of the plurality of feature points.

First claim

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The invention claimed is: 1. A dimension measurement apparatus that measures a dimension of a semiconductor device having a repetitive pattern based on a cross-sectional image of the semiconductor device, the dimension measurement apparatus comprising: a processor; a memory; and a dimension measurement program that is stored in the memory and measures the dimension of the semiconductor device by being executed by the processor, wherein the dimension measurement program includes a model estimation unit and a dimension measurement unit, the model estimation unit outputs, by a first image recognition model, a labeled image in which the cross-sectional image is labeled for each of a plurality of unit patterns, each said unit pattern being repeated in each region, and outputs, by a second image recognition model, coordinates where each of the plurality of unit patterns constituting the repetitive pattern are respectively located in the cross-sectional image, and the dimension measurement unit obtains coordinates of a plurality of feature points, said plurality of feature points being defined in advance for each of the plurality of unit patterns using the labeled image and the coordinates where each of the unit patterns are located, and measures a dimension defined as a distance between two predetermined points among the plurality of feature points. 2. The dimension measurement apparatus according to claim 1 , wherein a region where the first image recognition model labels the cross-sectional image includes each layer constituting a cross section of the semiconductor device and a background other than the cross section of the semiconductor device, and the model estimation unit obtains coordinates of a region boundary line between regions from the labeled image, obtains the coordinates of the plurality of feature points from the coordinates of the region boundary line and the coordinates where the unit patterns are located. 3. The dimension measurement apparatus according to claim 2 , wherein the dimension measurement program includes a model learning unit, and the model learning unit learns the first image recognition model by first learning data in which the cross-sectional image of the semiconductor device is input data and the labeled image obtained by labeling the cross-sectional image as the input data for each region is output data, and learns the second image recognition model by second learning data in which the cross-sectional image of the semiconductor device is input data and the coordinates where the unit patterns are located in the cross-sectional image as the input data are output data. 4. The dimension measurement apparatus according to claim 3 , wherein the first image recognition model is a semantic segmentation model and the second image recognition model is an object detection model. 5. The dimension measurement apparatus according to claim 4 , wherein the first image recognition model is a learning model including a parameter learned using teacher data, in which a luminance value of a pixel of the cross-sectional image of the semiconductor device is input data and a label number defined corresponding to a region to which the pixel of the cross-sectional image corresponding to the input data belongs is output data, in an intermediate layer, and the second image recognition model is a learning model including a parameter learned using teacher data, in which a luminance value of a pixel of the cross-sectional image of the semiconductor device is input data and a label number of an object included in the cross-sectional image corresponding to the input data and coordinates where the object is located are output data, in an intermediate layer. 6. The dimension measurement apparatus according to claim 1 , wherein the cross-sectional image is one of a cross-sectional SEM image and a TEM image. 7. The dimension measurement apparatus according to claim 1 , wherein the dimension measurement unit stores a measured dimension of the semiconductor device in a database, and, when a target dimension value for the semiconductor device is input, searches the database for a cross-sectional image having a dimension that is close to the target dimension value. 8. A semiconductor manufacturing system comprising: the dimension measurement apparatus according to claim 1 ; a processing apparatus that performs processing to the semiconductor device; and a processing condition searching apparatus that searches for an optimal processing condition of processing the semiconductor device by the processing apparatus, wherein the dimension measurement apparatus measures a dimension of the semiconductor device obtained by the processing apparatus performing processing under a predetermined processing condition set by the processing condition searching apparatus, and the processing condition searching device outputs, as the optimal processing condition, a processing condition when the dimension of the semiconductor device measured by the dimension measurement apparatus converges to a target value while changing the predetermined processing condition. 9. A dimension measurement apparatus that measures a dimension of a semiconductor device having a repetitive pattern from a cross-sectional image of the semiconductor device, the dimension measurement apparatus comprising: a processor; a memory; and a dimension measurement program that is stored in the memory and measures a dimension of the semiconductor device by being executed by the processor, wherein the dimension measurement program includes a model estimation unit and a dimension measurement unit, the model estimation unit outputs, by a first image recognition model, a first labeled image in which the cross-sectional image includes a first plurality of labeled points on a contour line and a background, and outputs, by a second image recognition model, a second labeled image in which the cross-sectional image includes a second plurality of labeled points in the background and a first plurality of feature points which include said first plurality of labeled points on the contour line, said first plurality of feature points defining one of a plurality of unit patterns constituting the repetitive pattern, and the dimension measurement unit uses coordinates of the contour line from the first labeled image and coordinates of the first plurality of feature points from the second labeled image to obtain a second plurality of feature points on the contour line, and measures a dimension defined as a distance between a predetermined point of the first plurality of feature points and a predetermined point of the second plurality of feature points. 10. The dimension measurement apparatus according to claim 9 , wherein the unit pattern in the cross-sectional image has a shape that can be assumed symmetry, and the dimension measurement unit obtains coordinates of the second plurality of feature points from the coordinates of the first plurality of feature points based on the symmetry. 11. The dimension measurement apparatus according to claim 9 , wherein the dimension measurement program includes a model learning unit, the model learning unit learns the first image recognition model by first learning data in which the cross-sectional image of the semiconductor device is input data and a labeled image obtained by labeling the cross-sectional image, which is the input data, separately into the contour line and the background is output data, and learns the second image recognition model by second learning data in which the cross-sectional image of the semiconductor device is input data and a labeled image obtained by labeling the cross-sectional im

Assignees

Inventors

Classifications

  • Production flow monitoring, e.g. for increasing throughput · CPC title

  • H10P74/203Primary

    Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Electron or ion microscopes; Electron or ion diffraction tubes · CPC title

  • Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant · CPC title

  • Machine learning · CPC title

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What does patent US11600536B2 cover?
The disclosure relates to a dimension measurement apparatus that reduces time required for dimension measurement and eliminates errors caused by an operator. Therefore, the dimension measurement apparatus uses a first image recognition model that extracts a boundary line between a processed structure and a background over the entire cross-sectional image and/or a boundary line of an interface b…
Who is the assignee on this patent?
Hitachi High Tech Corp
What technology area does this patent fall under?
Primary CPC classification H10P74/203. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 07 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).