Method for manufacturing a multilayer ceramic electronic component

US11600445B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11600445-B2
Application numberUS-202017016687-A
CountryUS
Kind codeB2
Filing dateSep 10, 2020
Priority dateSep 19, 2019
Publication dateMar 7, 2023
Grant dateMar 7, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer ceramic electronic component includes a multilayer body including two major surfaces opposite to each other in a layer stacking direction, two side surfaces opposite to each other in a widthwise direction orthogonal or substantially orthogonal to the layer stacking direction, and two end surfaces opposite to each other in a lengthwise direction orthogonal or substantially orthogonal to the layer stacking direction and the widthwise direction, and external electrodes provided on the two end surfaces. A method for manufacturing the multilayer ceramic capacitor component includes preparing a plurality of multilayer bodies, stacking the plurality of multilayer bodies via a binder, rotating the plurality of multilayer bodies by about 90° with the lengthwise direction defining and functioning as an axis of rotation, and providing a side gap portion; and removing the binder from the multilayer body provided with the side gap portion.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a multilayer ceramic electronic component, the method comprising: preparing a plurality of the multilayer bodies each including a plurality of stacked ceramic layers and including a first major surface and a second major surface opposite to each other in a layer stacking direction, a first side surface and a second side surface opposite to each other in a widthwise direction substantially orthogonal to the layer stacking direction, and a first end surface and a second end surface opposite to each other in a lengthwise direction substantially orthogonal to the layer stacking direction and the widthwise direction; stacking the plurality of multilayer bodies by adhering a binder between respective major surfaces of at least two of the plurality of the multilayer bodies; rotating the stacked plurality of multilayer bodies concurrently by about 90° with the lengthwise direction defining and functioning as an axis of rotation; providing a side gap portion on at least a portion of the first side surface or the second side surface of the plurality of multilayer bodies; and removing the binder from the plurality of multilayer bodies after being provided with the side gap portion to provide the multilayer ceramic electronic component; wherein the multilayer ceramic electronic component includes a length of a dimension T in the layer stacking direction and a length of a dimension W in the widthwise direction; and the dimension T is smaller than the dimension W. 2. The method for manufacturing a multilayer ceramic electronic component according to claim 1 , wherein the dimension T of the multilayer ceramic electronic component is not less than 0.08 mm and not more than 0.15 mm, and the dimension W of the multilayer ceramic electronic component is not less than twice the dimension T. 3. The method for manufacturing a multilayer ceramic electronic component according to claim 1 , wherein the binder is a water-soluble film; and the removing the binder includes dissolving the water-soluble film with water. 4. The method for manufacturing a multilayer ceramic electronic component according to claim 1 , wherein the preparing the plurality of multilayer bodies includes screen-printing an external electrode on at least one of the first and second major surfaces of the multilayer bodies. 5. The method for manufacturing a multilayer ceramic electronic component according to claim 1 , further comprising forming an end surface electrode by a dipping method after the step of removing the binder. 6. The method for manufacturing a multilayer ceramic electronic component according to claim 1 , wherein each of the multilayer bodies has a substantially rectangular parallelepiped shape. 7. The method for manufacturing a multilayer ceramic electronic component according to claim 1 , wherein the preparing the plurality of the multilayer bodies includes forming a first internal electrode layer and a forming second internal electrode layer; and at least one of the plurality of stacked ceramic layers is provided between the first internal electrode layer and the second internal electrode layer in a stacking direction of the plurality of stacked ceramic layers. 8. The method for manufacturing a multilayer ceramic electronic component according to claim 7 , wherein the first internal electrode layer includes a first opposite electrode portion and a first lead electrode portion; the second internal electrode layer includes a second opposite electrode portion and a second lead electrode portion; and the first opposite electrode portion and the second opposite electrode portion face one another. 9. The method for manufacturing a multilayer ceramic electronic component according to claim 8 , further comprising: forming a first external electrode on the first end surface and forming a second external electrode on the second end surface; wherein the first lead electrode portion is electrically connected to the first external electrode; and the second lead electrode portion is electrically connected to the second external electrode. 10. The method for manufacturing a multilayer ceramic electronic component according to claim 7 , further comprising: forming a first external electrode on the first end surface and forming a second external electrode on the second end surface; wherein the forming the first internal electrode layer includes forming a plurality of first internal electrode layers, and the forming the second internal electrode layer includes forming a plurality of second internal electrode layers. 11. The method for manufacturing a multilayer ceramic electronic component according to claim 1 , wherein at least one of the plurality of stacked ceramic layers includes a dielectric material. 12. The method for manufacturing a multilayer ceramic electronic component according to claim 1 , wherein the providing the side gap portion includes providing a first side gap portion that covers at least a portion of the first side surface and providing a second side gap portion that covers at least a portion of the second side surface. 13. The method for manufacturing a multilayer ceramic electronic component according to claim 12 , wherein the first side gap portion substantially entirely covers the first side surface and the second side gap portion substantially entirely covers the second side surface. 14. The method for manufacturing a multilayer ceramic electronic component according to claim 12 , further comprising: forming a first external electrode on the first end surface and forming a second external electrode on the second end surface; wherein the first external electrode at least partially covers the first side gap, and the second external electrode at least partially covers the second side gap. 15. The method for manufacturing a multilayer ceramic electronic component according to claim 1 , wherein the side gap portion is provided by pressing a sheeting including a resin and a rubber material against the plurality of multilayer bodies.

Assignees

Inventors

Classifications

  • characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence) · CPC title

  • electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence) · CPC title

  • Apparatus or processes for applying terminals · CPC title

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What does patent US11600445B2 cover?
A multilayer ceramic electronic component includes a multilayer body including two major surfaces opposite to each other in a layer stacking direction, two side surfaces opposite to each other in a widthwise direction orthogonal or substantially orthogonal to the layer stacking direction, and two end surfaces opposite to each other in a lengthwise direction orthogonal or substantially orthogona…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 07 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).