Switch with hysteresis

US11575379B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11575379-B2
Application numberUS-202217648492-A
CountryUS
Kind codeB2
Filing dateJan 20, 2022
Priority dateMar 23, 2021
Publication dateFeb 7, 2023
Grant dateFeb 7, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Switch circuitry including an input terminal (1), said input terminal connected to the base of a first transistor (Q1) via a first resistor (R3), said first transistor being an NPN Bipolar Gate Transistor (Q1), said circuitry further comprising a second resistor (R5) connected between the base of said first transistor (Q1) and ground, and including an output line or terminal (3) connected to the collector of said first transistor (Q1), and wherein the emitter of said first transistor (Q1) is connected to ground (earth), said circuitry further including a second transistor (Q2), said second transistor being a PNP Bipolar Gate Transistor, wherein the collector of said second transistor (Q2) is connected via a third resistor (R8) to the base of said first transistor (Q1), and the emitter of said second transistor (Q2) is connected to said input terminal (1), and wherein the emitter of said second transistor (Q2) is additionally connected to the base of said second transistor (Q2) via a fourth resistor (R11); and the base of said second transistor (Q2) being additionally connected to the output terminal (3) via a fifth resistor (R10) and a diode (D1).

First claim

Opening claim text (preview).

The invention claimed is: 1. Switch circuitry comprising an input terminal ( 1 ), said input terminal connected to the base of a first transistor (Q 1 ) via a first resistor (R 3 ), said first transistor being an NPN Bipolar Gate Transistor (Q 1 ), said circuitry further comprising a second resistor (R 5 ) connected between the base of said first transistor (Q 1 ) and ground, and including an output line or terminal ( 3 ) connected to the collector of said first transistor (Q 1 ), and wherein the emitter of said first transistor (Q 1 ) is connected to said ground (earth), said circuitry further including a second transistor (Q 2 ), said second transistor being a PNP Bipolar Gate Transistor, wherein the collector of said second transistor (Q 2 ) is connected via a third resistor (R 8 ) to the base of said first transistor (Q 1 ), and the emitter of said second transistor (Q 2 ) is connected to said input terminal ( 1 ), and wherein the emitter of said second transistor (Q 2 ) is additionally connected to the base of said second transistor (Q 2 ) via a fourth resistor (R 11 ); and the base of said second transistor (Q 2 ) being additionally connected to the output terminal ( 3 ) via a fifth resistor (R 10 ) and a diode (D 1 ). 2. Circuitry as claimed in claim 1 , wherein said diode (D 1 ) is electrically connected between said fourth resistor (R 10 ) and said output line or terminal ( 3 ).

Assignees

Inventors

Classifications

  • Combinations of only lateral BJTs · CPC title

  • H03K17/30Primary

    Modifications for providing a predetermined threshold before switching (shaping pulses by thresholding H03K5/08) · CPC title

  • H03K17/693Primary

    Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors (logic circuits H03K19/00; code converters H03M5/00, H03M7/00) · CPC title

  • in bipolar transistor circuits · CPC title

  • Low side switches, i.e. the lower potential [DC] or neutral wire [AC] being directly connected to the switch and not via the load · CPC title

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Frequently asked questions

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What does patent US11575379B2 cover?
Switch circuitry including an input terminal (1), said input terminal connected to the base of a first transistor (Q1) via a first resistor (R3), said first transistor being an NPN Bipolar Gate Transistor (Q1), said circuitry further comprising a second resistor (R5) connected between the base of said first transistor (Q1) and ground, and including an output line or terminal (3) connected to th…
Who is the assignee on this patent?
Delphi Tech Ip Ltd
What technology area does this patent fall under?
Primary CPC classification H03K17/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 07 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).