Radio frequency switch
US-9197280-B1 · Nov 24, 2015 · US
US9503074B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9503074-B2 |
| Application number | US-201514640377-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 6, 2015 |
| Priority date | Mar 6, 2015 |
| Publication date | Nov 22, 2016 |
| Grant date | Nov 22, 2016 |
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In some method and apparatus embodiments, an RF circuit comprises a switch transistor having a source, a drain, a gate, and a body. A gate control voltage is applied to the gate of the switch transistor. A body control voltage is applied to the body of the switch transistor. The body control voltage is a positive bias voltage when the switch transistor is in an on state. In some embodiments, an RF circuit comprises a control voltage applied to the gate of the switch transistor through a first resistance and applied to the body of the switch transistor through a second resistance. The first resistance is different from the second resistance.
Opening claim text (preview).
What is claimed is: 1. A method comprising: applying a gate control voltage to a gate of a switch transistor in an RF circuit; applying a body control voltage to a body of the switch transistor, wherein the body control voltage is a positive bias voltage when the switch transistor is in an on state: wherein the gate control voltage is applied from a first voltage control source to the gate; and wherein the body control voltage is applied from a second voltage control source to the body, further wherein the second voltage control source is independent from the first voltage control source. 2. The method of claim 1 , wherein: the positive bias voltage is greater than about 0.7 volts. 3. The method of claim 1 , further comprising: improving device linearity of the RF circuit by applying the positive bias voltage to the body of the switch transistor when the switch transistor is in the on state. 4. The method of claim 3 , wherein: the improved device linearity is a mitigated harmonic signal at three times a fundamental frequency of the RF circuit. 5. An RF circuit comprising: a switch transistor comprising a source, a drain, a gate, and a body; a first voltage control source configured to apply a gate control voltage to the gate; and a second voltage control source, independent from the first voltage control source, configured to apply a body control voltage to the body such that the body control voltage is a positive bias voltage when the switch transistor is in an on state. 6. The RF circuit of claim 5 , wherein: the positive bias voltage is greater than 0.7 volts. 7. The RF circuit of claim 5 , wherein: the positive bias voltage is between 0.7 volts and about 5 volts. 8. The RF circuit of claim 5 , wherein: the first voltage control source comprises a first voltage level shifter coupled to a first positive voltage generator and a first negative voltage generator; and the second voltage control source comprises a second voltage level shifter coupled to a second positive voltage generator and a second negative voltage generator. 9. The RF circuit of claim 5 , wherein: wherein the second voltage control source is configured to apply a negative bias voltage when the switch transistor is in an off state.
in field-effect transistor switches · CPC title
Modifications for providing a predetermined threshold before switching (shaping pulses by thresholding H03K5/08) · CPC title
Details · CPC title
Special modifications or use of the back gate voltage of a FET · CPC title
Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors (logic circuits H03K19/00; code converters H03M5/00, H03M7/00) · CPC title
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