Radio receiver and communications system

Patent metadata

Field	Value
Publication number	US-11569855-B2
Application number	US-202016999829-A
Country	US
Kind code	B2
Filing date	Aug 21, 2020
Priority date	Feb 28, 2018
Publication date	Jan 31, 2023
Grant date	Jan 31, 2023

Abstract

A software defined radio type radio receiver is used in an environment that is self-sufficient in energy. The radio receiver has a receiving device, which receives the data in the form of a data packet or a portion thereof or a data stream at a certain data rate, and provides the data for further data processing. Wherein in an operating mode, the data is diverted at the receiving device and supplied to a microcontroller at a sampling rate which preferably can be defined. The microcontroller decimates the data by selecting a subset from the set of samples, and the microcontroller buffers in a memory and provides for further processing the decimated data.

First claim

The invention claimed is:

1. A radio receiver for use in an environment that is self-sufficient in energy, the radio receiver comprising:
a microcontroller having a memory;
a receiving device with a microprocessor or a logic circuit or a digital receiving circuit, said receiving device receiving data in a form of at least one data packet or a portion thereof or a data stream at a certain data rate, and providing the data for further data processing, wherein the data is in-phase/quadrature (I/O) data;
said receiving device in an operating mode A, where received, or received and filtered, data is diverted at said receiving device and supplied to said microcontroller at a sampling rate which can be defined;
a switchover device, the operating mode A being selectable by said switchover device;
said microcontroller or said receiving device in the operating mode A decimates the data by selecting a subset from a set of samples;
said microcontroller in the operating mode A buffers in said memory and provides for further processing of decimated data;
wherein an operating mode C is provided in addition to the operating mode A, in which said operating mode C, the data is processed by said microprocessor or said logic circuit or said digital receiving circuit, which is connected after said receiving device and/or is part of said receiving device, before the processed data is transferred to said microcontroller for further processing; and
the operating mode C being selectable by said switchover device, and it is possible to switch between the operating mode A and the operating mode C.

2. The radio receiver according to claim 1 , wherein the radio receiver is a software defined radio type.

3. The radio receiver according to claim 1 , further comprising a clock generator, and the sampling rate is defined by a clock frequency of said clock generator.

4. The radio receiver according to claim 3 , wherein the clock frequency of said clock generator lies between 20 MHz and 50 MHz.

5. The radio receiver according to claim 3 , wherein an error in the clock frequency of said clock generator is less than 10 ppm.

6. The radio receiver according to claim 1 , further comprising a clock generator; and
wherein the radio receiver is of a type in which signal processing is implemented at least mainly by hardware, and a sampling error is modified by selecting said clock generator on the basis of its clock frequency.

7. The radio receiver according to claim 1 , wherein said receiving device has a filter that filters the data before supplying the data to said microcontroller.

8. The radio receiver according to claim 1 , wherein said microcontroller has a filter that filters the data before decimation.

9. The radio receiver according to claim 8 , wherein a bandwidth at which the data is supplied after said filter to said microcontroller is less than 200 kHz.

10. The radio receiver according to claim 1 , wherein the data is decimated by said microcontroller disregarding individual samples of the set of samples supplied by said receiving device, and the individual samples being selected on a basis of an integer decimation factor.

11. The radio receiver according to claim 1 , wherein different sampling rates can be defined at said microcontroller for different bandwidths.

12. The radio receiver according to claim 1 , wherein the operating mode A can be enabled and/or disabled.

13. The radio receiver according to claim 1 , wherein the data is transferred between said receiving device and said microcontroller in steps, and time intervals in which no transfer takes place are provided between a transfer of the data.

14. The radio receiver according to claim 13 , wherein the time intervals in which no data is transferred, said microcontroller shifts into a sleep mode.

15. The radio receiver according to claim 1 , wherein said microcontroller is configured to decode the data.

16. The radio receiver according to claim 1 , wherein said microcontroller is configured to process also higher layers in addition to processing and storing the data.

17. The radio receiver according to claim 1 , wherein said receiving device and said microcontroller are embodied as a common structural unit.

18. The radio receiver according to claim 1 , wherein said radio receiver has an energy source for supplying energy.

19. A communication system for transferring data, the communication system comprising:
at least one concentrator;
a plurality of terminals that are self-sufficient in energy, each of said terminals containing said radio receiver according to claim 1 , said receiving device receiving the data from said at least one concentrator in a form of at least one data packet or a portion thereof or a data stream at a certain data rate, and provides the data for further data processing.

20. A radio receiver for use in an environment that is self-sufficient in energy, the radio receiver comprising:
a microcontroller having a memory;
a receiving device receiving data in a form of at least one data packet or a portion thereof or a data stream at a certain data rate, and provides the data for further data processing, said receiving device in an operating mode A, where received, or received and filtered, data is diverted at said receiving device and supplied to said microcontroller at a sampling rate which can be defined;
a switchover device, the operating mode A being selectable by said switchover device;
said microcontroller or said receiving device decimates the data by selecting a subset from a set of samples;
said microcontroller buffers in said memory and provides for further processing of decimated data; and
a clock generator, wherein the radio receiver is of a type in which signal processing is implemented at least mainly by hardware, and a sampling error is modified by selecting said clock generator on a basis of its clock frequency.

Assignees

• Diehl Metering Systems Gmbh

Inventors

• Kauppert Thomas
• Gottschalk Klaus
• Petkov Hristo
• Mzyk Raphael

Classifications

• H04B1/0003 Primary

  Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain (digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00) · CPC title

• H04B1/16 Primary

  Circuits · CPC title

• H04L12/16

  Arrangements for providing special services to substations · CPC title

• H04B1/0046

  Decimation, i.e. data rate reduction techniques · CPC title

• H04B1/0021

  Decimation, i.e. data rate reduction techniques (H04B1/0025 takes precedence) · CPC title