Systems and methods for piezoelectric, electronic, and photonic devices with dual inversion layers

Patent metadata

Field	Value
Publication number	US-11569432-B2
Application number	US-202017098779-A
Country	US
Kind code	B2
Filing date	Nov 16, 2020
Priority date	Nov 15, 2019
Publication date	Jan 31, 2023
Grant date	Jan 31, 2023

Abstract

An apparatus comprising a substrate, one or more nanowire pillars, each having a base portion and a tip portion, a first electrode connected to the tip portions of the one or more nanowire pillars, an internal hollow cavity positioned between the substrate and the first electrode, such that at least a portion of each of the one or more nanowire pillars extend through the internal hollow cavity, and a second electrode proximate the first side of the substrate. High-performance broadband photodetectors and other optoelectronics for converting light to electricity with enhanced absorption and carrier collection.

First claim

What is claimed is:

1. An apparatus comprising:
a dielectric layer having a first side and a second side, and positioned proximate a substrate;
nanowire pillars, each comprising:
a base portion positioned proximate the second side of the dielectric layer; and
a tip portion extending away from the base portion;

a first electrode having a first side and a second side, the first side being planar and positioned proximate to the tip portions of the nanowire pillars and the second side being non-planar; and
an internal hollow cavity positioned between the second side of the dielectric layer and the first side of the first electrode, such that at least a portion of the nanowire pillars extend through the internal hollow cavity.

2. The apparatus of claim 1 further comprising a protective polymer material at least partially surrounding the nanowire pillars;
wherein each nanowire pillar is oriented substantially perpendicular to the dielectric layer.

3. The apparatus of claim 2 further comprising:
the substrate having a first side and a second side positioned proximate the first side of the dielectric layer; and
a second electrode having a first side and a second side positioned proximate the first side of the substrate;
wherein the second side of the first electrode is textured; and
wherein each nanowire pillar comprises one of an n-type semiconductor material or a p-type semiconductor material.

4. The apparatus of claim 3 , wherein the substrate comprises one of an n-type semiconductor material or a p-type semiconductor material.

5. The apparatus of claim 4 , wherein the p-type semiconductor material is selected from the group consisting of silicon, boron, gallium, zinc sulfide, copper sulfide, tin (II) sulfide, zinc phosphide, copper tin sulfide, and combinations thereof, and
wherein the n-type material is selected from the group consisting of zinc oxide, zinc tin oxide, zinc selenide, zinc sulfide, tin oxide, tin dioxide, gallium phosphide, cadmium selenide, cadmium arsenide, titanium dioxide, copper (II) oxide, zirconate titanate, barium titanate, lead titanate, lead niobate, lithium tantalite, potassium niobate, sodium tungstate, and combinations thereof.

6. The apparatus of claim 3 , wherein at least a portion of the second side of the substrate is covered with the dielectric layer.

7. The apparatus of claim 1 , wherein the dielectric layer comprises a metal oxide or nitride selected from the group consisting of titanium dioxide, zirconium dioxide, tin oxide, tin dioxide, aluminum oxide, alumina, silicon dioxide, zinc oxide, indium oxide, hafnium oxide, titanium nitride, aluminum nitride, silicon nitride, hafnium nitride, zirconium nitride, tantalum nitride and combinations thereof.

8. The apparatus of claim 1 , wherein the first electrode comprises a transparent material configured to allow light to pass from the second side of the first electrode, through the first electrode, and into the internal hollow cavity.

9. The apparatus of claim 8 , wherein the transparent material is selected from the group consisting of indium tin oxide, fluorine tin oxide, indium zinc oxide, aluminum zinc oxide, indium cadmium oxide, barium stannate, strontium vanadate, calcium vanadate, poly(3,4-ethylenedioxythiophene), poly(styrene sulfonate), poly(4,4-dioctyl cyclopentadithiophene), thin-film silver, thin-film gold, and combinations thereof.

10. An apparatus comprising:
a substrate comprising semiconductor material having a first side and a second side;
a dielectric layer having a first side and a second side positioned proximate the substrate;
nanowire pillars comprising semiconductor material, each comprising:
a base portion positioned proximate the second side of the dielectric layer; and
a tip portion extending away from the base portion;

a protective polymer material at least partially surrounding the nanowire pillars;
a first electrode having a first side and a second side, the first side being planar and positioned proximate to the tip portions of the nanowire pillars and the second side being textured; and
an internal hollow cavity positioned between the second side of the dielectric layer and the first side of the first electrode, such that at least a portion of the nanowire pillars extend through the internal hollow cavity.

11. The apparatus of claim 10 further comprising a seed layer having a first side and a second side, the first side positioned proximate the second side of the dielectric layer, and the second side positioned proximate the base portions of the nanowire pillars.

12. The apparatus of claim 10 further comprising a second electrode having a first side and a second side positioned proximate the first side of the substrate;
wherein the first electrode is in electrical communication with the second electrode via one or more of the nanowire pillars.

13. A method of producing an apparatus comprising:
depositing a seed layer proximate a second side of a substrate having a first side and the second side;
growing one or more nanowire pillars, wherein one or more of the nanowire pillars have a base portion positioned proximate the seed layer and a tip portion extending away from the base portion;
at least partially surrounding one or more of the nanowire pillars with a protective polymer material;
depositing a first electrode proximate the tip portions of one or more of the nanowire pillars, the first electrode having a first side and a second side, the first side proximate the tip portions; and
removing at a least a portion of the protective polymer material to create an internal hollow cavity between the seed layer and the first electrode, such that at least a portion of one or more of the nanowire pillars extends through the internal hollow cavity.

14. The method of claim 13 further comprising:
prior to depositing the seed layer proximate the second side of the substrate, depositing a dielectric layer on the second side of the substrate; and
depositing a second electrode proximate the first side of the substrate, such that the first electrode is in electrical communication with the second electrode via one or more of the nanowire pillars.

15. The method of claim 14 , wherein the dielectric layer comprises a metal oxide or nitride selected from the group consisting of titanium dioxide, zirconium dioxide, tin oxide, tin dioxide, aluminum oxide, alumina, silicon dioxide, zinc oxide, indium oxide, hafnium oxide, titanium nitride, aluminum nitride, silicon nitride, hafnium nitride, zirconium nitride, tantalum nitride and combinations thereof.

16. The method of claim 14 , wherein the dielectric layer has a thickness from about 0.1 nm to about 150 nm.

17. The method of claim 13 further comprising:
prior to depositing the first electrode, removing a portion of the protective polymer material proximate the tip portion of one or more of the nanowire pillars to expose the tip portion;
wherein depositing the first electrode creates the second side of the first electrode, such that the second side of the first electrode is non-planar.

18. The method of claim 13 further comprising the substrate;
wherein the substrate comprises a p-type semiconductor material or an n-type semiconductor material, wherein the one or more nanowire pillars comprise a p-type semiconducting material or an n-type semiconductor material.

19. The method of claim 18 , wherein the p-type semiconductor material is selected from the group consisting of silicon, boron, gallium, zinc sulfide, copper sulfide, tin (II) sulfide, zinc

Assignees

• Georgia Tech Res Inst

Inventors

• Wang Zhong Lin
• Zou Haiyang

Classifications

• H01L31/022466

  Electricity · mapped topic

• B82Y30/00

  Nanotechnology for materials or surface science, e.g. nanocomposites · CPC title

• B82Y40/00

  Manufacture or treatment of nanostructures · CPC title

• H01L31/035227

  Electricity · mapped topic

• H01L41/083 Primary

  Electricity · mapped topic