Semiconductor device and electronic appliance

US11569287B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11569287-B2
Application numberUS-201916565200-A
CountryUS
Kind codeB2
Filing dateSep 9, 2019
Priority dateSep 28, 2012
Publication dateJan 31, 2023
Grant dateJan 31, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present technique relates to a semiconductor device and an electronic appliance in which the reliability of the fine transistor can be maintained while the signal output characteristic is improved in a device formed by stacking semiconductor substrates.The semiconductor device includes a first semiconductor substrate, a second semiconductor substrate providing a function different from a function provided by the first semiconductor substrate, and a diffusion prevention film that prevents diffusion of a dangling bond terminating atom used for reducing the interface state of the first semiconductor substrate and the second semiconductor substrate, wherein at least two semiconductor substrates are stacked and the semiconductor substrates are electrically connected to each other, and the first semiconductor substrate and the second semiconductor substrate are stacked with the diffusion prevention film inserted between an interface of the first semiconductor substrate and an interface of the second semiconductor substrate.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a first semiconductor substrate; a second semiconductor substrate providing a function different from a function provided by the first semiconductor substrate; a first film disposed between the first semiconductor substrate and the second semiconductor substrate; a second film disposed between the first semiconductor substrate and the first film; and a third film formed between the second semiconductor substrate and the first film, wherein the first semiconductor substrate and the second semiconductor substrate are stacked with the first film inserted between an interface of the first semiconductor substrate and an interface of the second semiconductor substrate, and wherein a state of the interface of the first semiconductor substrate is lower than the interface of the second semiconductor substrate. 2. The semiconductor device according to claim 1 , wherein the second film is an atom supply film that supplies a dangling bond terminating atom, wherein the dangling bond terminating atom is hydrogen, and wherein an insulating thin film in the first semiconductor substrate formed by a silicon nitride thin film is used as the atom supply film. 3. The semiconductor device according to claim 2 , wherein the first semiconductor substrate and the second semiconductor substrate are stacked, and wherein the third film that occludes the dangling bond terminating atom is between the first film and the second semiconductor substrate. 4. The semiconductor device according to claim 3 , wherein the dangling bond terminating atom is hydrogen, and wherein a barrier metal covering a multilayer wiring layer or an extraction electrode in the second semiconductor substrate is formed of titanium, and is used as the third film. 5. The semiconductor device according to claim 1 , wherein the semiconductor device is structured as a solid-state imaging device, and wherein a pixel portion is provided in the first semiconductor substrate and a logic circuit is provided in the second semiconductor substrate. 6. The semiconductor device according to claim 5 , further comprising: a third semiconductor substrate provided with a memory circuit, wherein the second semiconductor substrate is provided between the first semiconductor substrate and the third semiconductor substrate, and wherein another first film that prevents diffusion of a dangling bond terminating atom is between the interface of the second semiconductor substrate and an interface of the third semiconductor substrate. 7. The semiconductor device according to claim 1 , wherein the first film is a SiN film formed by plasma chemical vapor deposition (CVD). 8. The semiconductor device according to claim 1 , wherein the first film is formed on a support substrate by a film formation process at 600° C. or more, and wherein the first film formed on the support substrate and the second semiconductor substrate are bonded to each other and the support substrate is polished to be removed. 9. The semiconductor device according to claim 8 , wherein the first film is a SiN film formed by low pressure chemical vapor deposition (LP-CVD). 10. The semiconductor device according to claim 8 , wherein the first film has a film density of 2.7 g/cm to 3.5 g/cm. 11. The semiconductor device according to claim 8 , wherein the first film has a thickness of 150 nm or less. 12. The semiconductor device according to claim 8 , wherein the first film is a SiN film formed by atomic layer deposition-chemical vapor deposition (ALD-CVD). 13. The semiconductor device according to claim 1 , wherein the first semiconductor substrate and the second semiconductor substrate are stacked with their multilayer wiring layers facing each other. 14. The semiconductor device according to claim 1 , wherein the first semiconductor substrate and the second semiconductor substrate are stacked with their multilayer wiring layers not facing each other. 15. An electronic appliance comprising: a first semiconductor substrate; a second semiconductor substrate providing a function different from a function provided by the first semiconductor substrate; a first film disposed between the first semiconductor substrate and the second semiconductor substrate; a second film disposed between the first semiconductor substrate and the first film; and a third film formed between the second semiconductor substrate and the first film, wherein the first semiconductor substrate and the second semiconductor substrate are stacked with the first film inserted between an interface of the first semiconductor substrate and an interface of the second semiconductor substrate, and wherein a state of the interface of the first semiconductor substrate is lower than the interface of the second semiconductor substrate. 16. The electronic appliance of claim 15 , wherein the first film comprises a diffusion prevention film that prevents diffusion of a dangling bond terminating atom used for reducing an interface state of the first semiconductor substrate and the second semiconductor substrate. 17. The electronic appliance of claim 16 , wherein the second film comprises an atom supply that supplies the dangling bond terminating atom between the first semiconductor substrate and the diffusion prevention film. 18. The electronic appliance of claim 16 , wherein the third film comprises an atom occlusion formed between the second semiconductor substrate and the diffusion prevention film.

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What does patent US11569287B2 cover?
The present technique relates to a semiconductor device and an electronic appliance in which the reliability of the fine transistor can be maintained while the signal output characteristic is improved in a device formed by stacking semiconductor substrates.The semiconductor device includes a first semiconductor substrate, a second semiconductor substrate providing a function different from a fu…
Who is the assignee on this patent?
Sony Corp
What technology area does this patent fall under?
Primary CPC classification H01L27/14634. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 31 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).