Atomic layer etching on microdevices and nanodevices

Patent metadata

Field	Value
Publication number	US-11565936-B2
Application number	US-201716303612-A
Country	US
Kind code	B2
Filing date	May 25, 2017
Priority date	May 25, 2016
Publication date	Jan 31, 2023
Grant date	Jan 31, 2023

Abstract

The present invention relates to the unexpected discovery of novel methods of preparing nanodevices and/or microdevices with predetermined patterns. In one aspect, the methods of the invention allow for engineering structures and films with continuous thickness equal to or less than 50 nm.

First claim

What is claimed is:

1. A method of generating a microdevice or nanodevice (micro/nanodevice), the method comprising:
providing a sacrificial layer and a device layer,
wherein a first portion of the device layer is not in contact with the sacrificial layer and a second portion of the device layer is in contact with the sacrificial layer;
wherein the first portion of the device layer comprises at least a top and an underside; and

performing:
i) thermal atomic layer etching (ALE) on the at least top and underside of the first portion of the device layer; or
ii) thermal ALE on the sacrificial layer;

wherein, before ALE is performed on at least one exposed surface of the device layer, at least one of the following is performed:
(a) masking at least a portion of the exposed surface of the device layer;
(b) coating the exposed surface of the device layer with an atomic layer etching (ALE)-resistant material, and then etching the ALE-resistant material, so as to expose at least a portion of the surface of the device layer, wherein the etching is optionally anisotropic; and
generating the micro/nanodevice comprising the device layer.

2. The method of claim 1 , wherein at least one applies:
(a) the micro/nanodevice's device layer has a thickness of ≤50 nm;
(b) wherein the micro/nanodevice's device layer has length and width that are independently selected from the group consisting of ≥1 μm, ≥2 μm, ≥4 μm, ≥6 μm, ≥8 μm, ≥10 μm, ≥20 μm, ≥40 μm, ≥60 μm, ≥80 μm, and ≥100 μm.

3. The method of claim 1 , wherein at least a portion of the device layer is fabricated using a procedure selected from the group consisting of atomic layer deposit (ALD), micromachining, molecular layer deposition (MLD), reactive ion beam deposition, chemical vapor deposition, sputtering, evaporation, sol-gel processing, electroplating, photopolymerization, three-dimensional (3D) printing, spin coating, spray coating, contact adhesion, casting, self-assembly, dip-coating, Langmuir-Blodgett deposition, and plasma enhanced chemical vapor deposition.

4. The method of claim 1 , wherein the device layer comprises two or more at least partially overlapping layers, optionally wherein at least one of the two or more at least partially overlapping layers is not significantly etched by ALE.

5. The method of claim 1 , wherein at least one applies:
(a) the microdevice or nanodevice is an absorbing mechanism for a microbolometer;
(b) the nanodevice or microdevice is at least partially freestanding.

6. The method of claim 1 , wherein at least a portion of the device layer is at least partially attached to the sacrificial layer through an intervening material layer,
optionally wherein at least one selected from the group consisting of the sacrificial layer and the intervening material layer is not significantly etched by ALE,
wherein at least one selected from the group consisting of the device layer and the intervening material is deposited onto the sacrificial layer or intervening material layer using at least one method selected from the group consisting of ALD, MLD, reactive ion beam deposition, chemical vapor deposition, sputtering, evaporation, sol-gel processing, electroplating, photopolymerization, 3D printing, spin coating, spray coating, contact adhesion, casting, self-assembly, dip-coating, Langmuir-Blodgett deposition, and plasma enhanced chemical vapor deposition.

7. The method of claim 1 , wherein the device layer comprises at least one material selected from the group consisting of Ag, Al, Al 2 O 3 , Au, Co, Cu, Fe, GaN, Ge, GeO 2 , HfO 2 , indium tin oxide, Ir, Mo, Ni, Pd, Pt, Rh, Ru, Ru, RuO 2 , Si, SiC, SiGe, SiO 2 , SnO 2 , Ta, Ti, TiN, TiO 2 , V 2 O 5 , VO x , W, ZnO, ZrO 2 , parylene, polyimide, polymethyldisiloxane, polystyrene, polypropylene, poly(methyl methacrylate), polyethylene, an epoxy, and poly(vinyl chloride).

8. The method of claim 1 , wherein the sacrificial layer comprises Si, SiO 2 , SiGe, Pyrex, Si 3 N 4 , sapphire, GaAs, SiC, a metal, an insulator, a semiconductor, or a solid organic material, and optionally wherein the sacrificial layer is a wafer.

9. The method of claim 1 , wherein the masking comprises at least one selected from the group consisting of photolithography, electron-beam (e-beam) lithography, nanoimprint lithography, x-ray lithography, a hard mask comprising an organic material, and a hard mask comprising an inorganic material layer.

10. The method of claim 1 , wherein the ALE-treated device layer is further coated.

11. The method of claim 1 , wherein the device layer comprises a first metal-containing material and wherein the ALE comprises:
(a) contacting the exposed device layer with a gaseous second metal-containing precursor, wherein the second metal-containing precursor comprises at least one ligand selected from the group consisting of a monodentate ligand, chelate and combinations thereof, whereby a first metal-containing precursor is formed;
(b) contacting the material formed in step (a) with a halogen-containing gas, whereby a first metal halide is formed; and
(c) optionally repeating steps (a) and (b) one or more times;
wherein, in at least one time point selected from the group consisting of: during step (a), in between step (a) and step (b), during step (b), and in between step (b) and step (a) of the following iteration, the exposed device layer is treated with an agent that promotes removal of at least a fraction of any ligand, or any residual surface species that results from a surface reaction, that is bound to or adsorbed onto the exposed device layer;
wherein the monodentate ligand comprises at least one selected from the group consisting of alkyl, hydride, carbonyl, halide, alkoxide, alkylamide, silylamide and combinations thereof; and,
wherein the chelate comprises at least one selected from the group consisting of β-diketonate, amidinate, acetamidinate, β-diketiminate, diamino alkoxide, metallocene and combinations thereof.

12. The method of claim 11 , wherein at least one selected from the group consisting of step (a) and step (b) is performed at a temperature that is equal to or greater than a value ranging from about 25° C. to about 450° C.

13. The method of claim 11 , wherein the first metal-containing material comprises at least one selected from the group consisting of metal oxide, metal nitride, metal phosphide, metal sulfide, metal arsenide, metal fluoride, metal silicide, metal boride, metal carbide, metal selenide, metal telluride, elemental metal, metal alloy, hybrid organic-inorganic material, and combinations thereof; optionally wherein, before step (a) takes place, the elemental metal is converted to the corresponding metal halide.

14. The method of claim 11 , wherein the exposed device layer is first submitted to a chemical treatment that results in the formation, on at least a portion of the surface of the exposed device layer, of a metal-containing material selected from the group consisting of a metal oxide, metal nitride, metal phosphide, metal sulfide, metal arsenide, metal fluoride, metal silicide, metal boride, metal carbide, metal selenide, metal telluride, elemental metal, metal alloy, hybrid organic-inorganic material, and combinations thereof.

15. The method of claim 11 , wherein at least one applies:
the first metal comprises at least one selected from the group consisting of Al, Hf, Zr, Fe, Ni, Co, Mn, Mg, Rh, Ru, Cr, Si, Ti, Ga, In, Zn, Pb, Ge, Ta, Cu, W, Mo, Pt, Cd, Sn, and combinations thereof;
the second metal comprises at least one selected from the group consisting of Sn, Ge, Al, B, Ga, In, Zn, Ni, Pb, Si, S, P, Hf, Zr, Ti and combinations there

Assignees

• Univ Colorado Regents
• Drs Network & Imaging Systems Llc

Inventors

• George Steven M
• Bright Victor M
• Brown Joseph J
• Gertsch Jonas
• Eigenfeld Nathan Thomas
• Skidmore George

Classifications

• H10P50/285

  of materials not containing Si, e.g. PZT or Al2O3 · CPC title

• H10P50/244

  comprising alternated and repeated etching and passivation steps · CPC title

• H10P50/242

  of Group IV materials · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10P50/28

  of insulating materials · CPC title