Enabling efficient guest access to peripheral component interconnect express (PCIe) configuration space

Patent metadata

Field	Value
Publication number	US-11561894-B2
Application number	US-202117142980-A
Country	US
Kind code	B2
Filing date	Jan 6, 2021
Priority date	Jan 6, 2021
Publication date	Jan 24, 2023
Grant date	Jan 24, 2023

Abstract

Techniques for enabling efficient guest OS access to PCIe configuration space are provided. In one set of embodiments, a hypervisor can reserve a single host physical memory page in the host physical memory of a host system and can populate the single host physical memory page with a value indicating non-presence of PCIe device functions. The hypervisor can then create, for each guest physical memory page in a guest physical memory of a virtual machine (VM) corresponding to a PCIe configuration space of an absent PCIe device function in the VM, a mapping in the hypervisor's second-level page tables that maps the guest physical memory page to the single host physical memory page.

First claim

What is claimed is:

1. A method comprising:
reserving, by a hypervisor of a host system, a single host physical memory page in a host physical memory of the host system;
populating, by the hypervisor, the single host physical memory page with a value indicating non-presence of PCIe (Peripheral Component Interconnect Express) device functions; and
creating, by the hypervisor for each guest physical memory page in a guest physical memory of a virtual machine (VM) corresponding to a PCIe configuration space of an absent PCIe device function in the VM, a mapping in second-level page tables of the hypervisor that maps the guest physical memory page to the single host physical memory page, the creating comprising:
creating, for all guest physical memory pages in a reserved ECAM (Enhanced Configuration Allocation Mechanism) address range of the VM, mappings in the second-level page tables between the guest physical memory pages and the single host physical memory page; and
initializing each PCIe device function present in the VM, the initializing including removing, from the second-level page tables, a mapping between a guest physical memory page corresponding to a PCIe configuration space of said each PCIe device function and the single host physical memory page.

2. The method of claim 1 wherein the mapping sets the single host physical memory page as read-only.

3. The method of claim 1 wherein the value is 0xFF.

4. The method of claim 1 further comprising, for each present PCIe device function in the VM:
reserving, in the host physical memory, another host physical memory page for the present PCIe device function; and
creating, in the second-level page tables, another mapping between a guest physical memory page addressed by an ECAM address of the present PCIe device function and said another host physical memory page, wherein said another mapping sets said another host physical memory page as writable.

5. The method of claim 4 further comprising:
assigning one or more hardware resources of the host system to the present PCIe device function;
populating said another host physical memory page with PCIe configuration space register values for the present PCIe device function, the PCIe configuration space register values including one or more values identifying the one or more hardware resources; and
modifying said another mapping to set said another host physical memory page as read-only.

6. The method of claim 4 wherein there are a plurality of present PCIe device functions in the VM, and wherein the plurality of present PCIe device functions include an emulated PCIe device function and a passthrough PCIe device function.

7. A non-transitory computer readable storage medium having stored thereon program code executable by a hypervisor of a host system, the program code causing the hypervisor to execute a method comprising:
reserving a single host physical memory page in a host physical memory of the host system;
populating the single host physical memory page with a value indicating non-presence of PCIe (Peripheral Component Interconnect Express) device functions; and
creating, for each guest physical memory page in a guest physical memory of a virtual machine (VM) corresponding to a PCIe configuration space of an absent PCIe device function in the VM, a mapping in second-level page tables of the hypervisor that maps the guest physical memory page to the single host physical memory page, the creating comprising:
creating, for all guest physical memory pages in a reserved ECAM (Enhanced Configuration Allocation Mechanism) address range of the VM, mappings in the second-level page tables between the guest physical memory pages and the single host physical memory page; and
initializing each PCIe device function present in the VM, the initializing including removing, from the second-level page tables, a mapping between a guest physical memory page corresponding to a PCIe configuration space of said each PCIe device function and the single host physical memory page.

8. The non-transitory computer readable storage medium of claim 7 wherein the mapping sets the single host physical memory page as read-only.

9. The non-transitory computer readable storage medium of claim 7 wherein the value is 0xFF.

10. The non-transitory computer readable storage medium of claim 7 wherein the method further comprises, for each present PCIe device function in the VM:
reserving, in the host physical memory, another host physical memory page for the present PCIe device function; and
creating, in the second-level page tables, another mapping between a guest physical memory page addressed by an ECAM address of the present PCIe device function and said another host physical memory page, wherein said another mapping sets said another host physical memory page as writable.

11. The non-transitory computer readable storage medium of claim 10 wherein the method further comprises:
assigning one or more hardware resources of the host system to the present PCIe device function;
populating said another host physical memory page with PCIe configuration space register values for the present PCIe device function, the PCIe configuration space register values including one or more values identifying the one or more hardware resources; and
modifying said another mapping to set said another host physical memory page as read-only.

12. The non-transitory computer readable storage medium of claim 10 wherein there are a plurality of present PCIe device functions in the VM, and wherein the plurality of present PCIe device functions include an emulated PCIe device function and a passthrough PCIe device function.

13. A host system comprising:
a host physical memory;
a processor; and
a non-transitory computer readable medium having stored thereon program code for a hypervisor that, when executed by the processor, causes the hypervisor to:
reserve a single host physical memory page in the host physical memory;
populate the single host physical memory page with a value indicating non-presence of PCIe (Peripheral Component Interconnect Express) device functions; and
create, for each guest physical memory page in a guest physical memory of a virtual machine (VM) corresponding to a PCIe configuration space of an absent PCIe device function in the VM, a mapping in second-level page tables of the hypervisor that maps the guest physical memory page to the single host physical memory page, the creating comprising:
creating, for all guest physical memory pages in a reserved ECAM (Enhanced Configuration Allocation Mechanism) address range of the VM, mappings in the second-level page tables between the guest physical memory pages and the single host physical memory page; and
initializing each PCIe device function present in the VM, the initializing including removing, from the second-level page tables, a mapping between a guest physical memory page corresponding to a PCIe configuration space of said each PCIe device function and the single host physical memory page.

14. The host system of claim 13 wherein the mapping sets the single host physical memory page as read-only.

15. The host system of claim 13 wherein the value is 0xFF.

16. The host system of claim 13 wherein the program code further causes the hypervisor to, for each present PCIe device function in the VM:
reserve, in the host physical memory, another host physical memory page for the present PCIe device function; and
create, in the second-level page tables, another mapping between a guest physical memory page addressed by an ECAM address of the present PC

Assignees

• Vmware Inc

Inventors

• Warkentin Andrei
• Fainkichen Alexander
• Li Ye
• Duchesne Regis
• Laplace Cyprien
• Hiriyuru Shruthi
• Kotian Sunil

Classifications

• G06F12/0646 Primary

  Configuration or reconfiguration · CPC title

• G06F13/4282

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F13/1668 Primary

  Details of memory controller · CPC title

• G06F2213/0026

  PCI express · CPC title

• G06F9/45558

  Hypervisor-specific management and integration aspects · CPC title