Superconducting output amplifier including compound DC-SQUIDs having both inputs driven by an input signal having the same phase

Patent metadata

Field	Value
Publication number	US-11552610-B2
Application number	US-202117219967-A
Country	US
Kind code	B2
Filing date	Apr 1, 2021
Priority date	Apr 1, 2021
Publication date	Jan 10, 2023
Grant date	Jan 10, 2023

Abstract

Superconducting output amplifiers (OAs) including compound direct current-superconducting quantum interference devices (DC-SQUIDs) having both inputs driven by an input signal having the same phase and related methods are described. An example superconducting OA includes: (1) a first compound DC-SQUID having a first DC-SQUID and a second DC-SQUID, and (2) a second compound DC-SQUID having a third DC-SQUID and a fourth DC-SQUID. The superconducting OA includes a first driver configured to receive a single flux quantum (SFQ) pulse train and amplify a first set of SFQ pulses associated with the SFQ pulse train to generate a first signal for driving the first DC-SQUID and the second DC-SQUID. The superconducting OA further includes a second driver configured to receive the SFQ pulse train and amplify a second set of SFQ pulses associated with the SFQ pulse train to generate a second signal for driving the third DC-SQUID and the fourth DC-SQUID.

First claim

What is claimed:

1. A superconducting output amplifier comprising:
a first compound direct current-superconducting quantum interference device (DC-SQUID) having a first DC-SQUID and a second DC-SQUID arranged in parallel to the first DC-SQUID;
a second compound DC-SQUID having a third DC-SQUID and a fourth DC-SQUID arranged in parallel to the third DC-SQUID;
an input terminal for receiving a single flux quantum (SFQ) pulse train;
a first driver configured to receive the SFQ pulse train from the input terminal and amplify a first set of SFQ pulses associated with the SFQ pulse train to generate a first signal for driving the first DC-SQUID and the second DC-SQUID; and
a second driver configured to receive the SFQ pulse train from the input terminal and amplify a second set of SFQ pulses associated with the SFQ pulse train to generate a second signal for driving the third DC-SQUID and the fourth DC-SQUID.

2. The superconducting output amplifier of claim 1 , further comprising an external direct current (DC) source configured to pre-bias each of the first DC-SQUID, the second DC-SQUID, the third DC-SQUID, and the fourth DC-SQUID.

3. The superconducting output amplifier of claim 1 , wherein the second compound DC-SQUID is stacked on top of the first compound DC-SQUID.

4. The superconducting output amplifier of claim 1 , wherein the SFQ pulse train comprises data corresponding to reciprocal quantum logic encoding.

5. The superconducting output amplifier of claim 1 , wherein the SFQ pulse train comprises data corresponding to phase-mode logic encoding.

6. The superconducting output amplifier of claim 1 , wherein the SFQ pulse train comprises positive SFQ pulses and negative SFQ pulses.

7. The superconducting output amplifier of claim 1 , wherein each of the first DC-SQUID, the second DC-SQUID, the third DC-SQUID, and the fourth DC-SQUID is powered using alternating current (AC) clock signals.

8. The superconducting output amplifier of claim 1 , wherein each of the first compound DC-SQUID and the second compound DC-SQUID is not configured to convert return to zero signals into non-return to zero signals.

9. A method for a superconducting output amplifier comprising a stack of a plurality of compound direct current-superconducting quantum interference devices (DC-SQUIDs), the method comprising:
receiving a pulse train comprising a plurality of single flux quantum (SFQ) pulses;
using a set of drivers, (1) amplifying a first set of pulses associated with the pulse train to generate a first set of signals for driving a first set of DC-SQUIDs associated with the plurality of compound DC-SQUIDs, and (2) amplifying a second set of pulses associated with the pulse train to generate a second set of signals for driving a second set of DC-SQUIDs associated with the plurality of compound DC-SQUIDs, wherein the first set of signals have a same phase as the second set of signals; and
using the stack of the plurality of compound DC-SQUIDs, converting the first set of signals and the second set of signals into an output voltage waveform.

10. The method of claim 9 , wherein the pulse train comprises data corresponding to reciprocal quantum logic encoding.

11. The method of claim 9 , wherein the pulse train comprises data corresponding to phase-mode logic encoding.

12. The method of claim 9 , wherein the pulse train comprises positive SFQ pulses and negative SFQ pulses.

13. The method of claim 9 , further comprising providing power to each of the first set of DC-SQUIDs and the second set of DC-SQUIDs using alternating current (AC) clock signals.

14. The method of claim 9 , wherein each of the first compound DC-SQUID and the second compound DC-SQUID is not configured to convert return to zero signals into non-return to zero signals.

15. A superconducting output amplifier comprising:
a first compound direct current-superconducting quantum interference device (DC-SQUID) having a first DC-SQUID and a second DC-SQUID arranged in parallel to the first DC-SQUID;
a second compound DC-SQUID having a third DC-SQUID and a fourth DC-SQUID arranged in parallel to the third DC-SQUID;
an input terminal for receiving a single flux quantum (SFQ) pulse train, wherein the SFQ pulse train comprises data corresponding to reciprocal quantum logic encoding or data corresponding to phase-mode logic encoding;
a first driver configured to receive the SFQ pulse train from the input terminal and amplify a first set of pulses associated with the SFQ pulse train to generate a first signal for driving the first DC-SQUID and the second DC-SQUID; and
a second driver configured to receive the SFQ pulse train from the input terminal and amplify a second set of pulses associated with the SFQ pulse train to generate a second signal for driving the third DC-SQUID and the fourth DC-SQUID.

16. The superconducting output amplifier of claim 15 , further comprising an external direct current (DC) source configured to pre-bias each of the first DC-SQUID, the second DC-SQUID, the third DC-SQUID, and the fourth DC-SQUID.

17. The superconducting output amplifier of claim 15 , wherein the second compound DC-SQUID is stacked on top of the first compound DC-SQUID.

18. The superconducting output amplifier of claim 15 , wherein the SFQ pulse train comprises positive SFQ pulses and negative SFQ pulses.

19. The superconducting output amplifier of claim 15 , wherein each of the first DC-SQUID, the second DC-SQUID, the third DC-SQUID, and the fourth DC-SQUID is powered using alternating current (AC) clock signals.

20. The superconducting output amplifier of claim 15 , wherein each of the first compound DC-SQUID and the second compound DC-SQUID is not configured to convert return to zero signals into non-return to zero signals.

Assignees

• Microsoft Technology Licensing Llc

Inventors

• Knee Derek Leslie
• Egan Jonathan D

Classifications

• H03K19/1952 Primary

  with electro-magnetic coupling of the control current · CPC title

• H03F19/00 Primary

  Amplifiers using superconductivity effects · CPC title

• H10N69/00

  Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00 · CPC title