Plasma etching method and semiconductor device fabrication method including the same

Patent metadata

Field	Value
Publication number	US-11545341-B2
Application number	US-202016891157-A
Country	US
Kind code	B2
Filing date	Jun 3, 2020
Priority date	Oct 2, 2019
Publication date	Jan 3, 2023
Grant date	Jan 3, 2023

Abstract

A plasma etching method and a semiconductor device fabrication method, the plasma etching method including providing a source power having a first single pulse to an electrostatic chuck in order to generate a plasma on a substrate; providing a first bias power having a burst pulse different from the first single pulse to concentrate the plasma on the substrate; and providing a second bias power having a second single pulse the same as the first single pulse to accelerate the plasma toward the substrate.

First claim

What is claimed is:

1. A plasma etching method, comprising:
providing a source power having a first single pulse to an electrostatic chuck in order to generate a plasma on a substrate;
providing a first bias power having a burst pulse different from the first single pulse to concentrate the plasma on the substrate; and
providing a second bias power having a second single pulse the same as the first single pulse to accelerate the plasma toward the substrate.

2. The plasma etching method as claimed in claim 1 , wherein the burst pulse includes:
a main pulse; and
a sub-pulse that has a pulse frequency less than a pulse frequency of the main pulse.

3. The plasma etching method as claimed in claim 2 , wherein
the pulse frequency of the main pulse is about 1 KHz, and
the pulse frequency of the sub-pulse is about 100 Hz.

4. The plasma etching method as claimed in claim 2 , wherein a duty cycle of the sub-pulse is about 20% to about 80%.

5. The plasma etching method as claimed in claim 2 , wherein each of the first single pulse and the second single pulse has the same pulse frequency as the pulse frequency of the main pulse.

6. The plasma etching method as claimed in claim 2 , wherein:
the second single pulse has a phase shift that is delayed with respect to the first single pulse and the main pulse, and
a duty cycle of the second single pulse is less than a duty cycle of the first single pulse and less than a duty cycle of the main pulse.

7. The plasma etching method as claimed in claim 1 , wherein
the source power has a first frequency of about 60 MHz,
the first bias power has a second frequency of about 2 MHz, and
the second bias power has a third frequency of about 400 KHz.

8. The plasma etching method as claimed in claim 7 , wherein the source power includes a two-level pulse having a high-level duration and a low-level duration that has a power less than a power of the high-level duration.

9. The plasma etching method as claimed in claim 8 , further comprising matching an impedance of the source power with an impedance of the plasma, wherein matching the impedance of the source power with the impedance of the plasma includes:
obtaining a first impedance by providing the first single pulse of the source power;
obtaining a second impedance by providing the two-level pulse of the source power; and
comparing the first impedance and the second impedance with each other to obtain an impedance difference.

10. The plasma etching method as claimed in claim 9 , wherein matching the impedance of the source power with the impedance of the plasma further includes:
tuning the first frequency of the source power in the low-level duration of the two-level pulse to obtain a first capacitance that removes an imaginary part of the impedance difference;
calculating a second capacitance that removes a real part of the impedance difference; and
matching the second impedance of the two-level pulse with the impedance of the plasma using the first capacitance and the second capacitance.

11. A plasma etching method, comprising:
providing a source power having a first pulse;
providing a first bias power having a second pulse that is synchronized with the first pulse; and
providing a second bias power having a third pulse that is synchronized with the first and second pulses,
wherein:
at least one of the first to third pulses has a pulse inclination,
at least one of the first to third pulses has an inclined duration and a flat duration, the inclined duration being generated due to the pulse inclination, the flat duration being arranged continuously with the inclined duration, and
the inclined duration has a power greater than half a power of the flat duration and less than the power of the flat duration.

12. The plasma etching method as claimed in claim 11 , wherein the pulse inclination includes:
an upward inclination; and
a downward inclination different from the upward inclination.

13. The plasma etching method as claimed in claim 11 , wherein the inclined duration is about 0.55 to 0.65 times the flat duration.

14. The plasma etching method as claimed in claim 11 , wherein the inclined duration includes:
an upward duration ahead of the flat duration; and
a downward duration behind the flat duration.

15. The plasma etching method as claimed in claim 14 , wherein the upward duration has a time period the same as a time period of the downward duration.

16. The plasma etching method as claimed in claim 11 , wherein the first pulse is a two-level pulse.

17. The plasma etching method as claimed in claim 16 , wherein the two-level pulse includes:
a low-level duration;
a high-level duration higher than the low-level duration; and
a first inclined duration between the low-level duration and the high-level duration, the first inclined duration having the pulse inclination.

18. The plasma etching method as claimed in claim 11 , wherein the second pulse includes:
a first pulse-off duration; and
a first pulse-on duration higher than the first pulse-off duration; and
a second inclined duration between the first pulse-off duration and the first pulse-on duration.

19. The plasma etching method as claimed in claim 11 , wherein the third pulse includes:
a second pulse-off duration;
a second pulse-on duration higher than the second pulse-off duration; and
a second inclined duration between the second pulse-off duration and the second pulse-on duration, the second inclined duration having the pulse inclination.

20. The plasma etching method as claimed in claim 11 , wherein each of the first to third pulses has a duty cycle of about 50%.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Yonghee
• Han Byunghun
• Kang Hyeongmo
• Na Donghyeon
• Sung Dougyong
• Shim Seungbo
• Lee Minjae
• Choi Myungsun
• Hur Minyoung

Classifications

• H10P72/722

  Details of electrostatic chucks · CPC title

• H10P50/242

  of Group IV materials · CPC title

• H01J37/32183 Primary

  Matching circuits · CPC title

• H01J2237/334

  Etching · CPC title

• H03H7/38

  Impedance-matching networks · CPC title