Power supply controllers

US11537189B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11537189-B2
Application numberUS-201816980505-A
CountryUS
Kind codeB2
Filing dateJun 11, 2018
Priority dateJun 11, 2018
Publication dateDec 27, 2022
Grant dateDec 27, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Example implementations relate to power supply controllers. In some examples, a controller can include instructions to: set a power threshold for a power supply coupled to a computing component when the computing component is operating in a first state, determine when the computing component is alternating from the first state to a second state, and allow the power supply to exceed the power threshold for a fixed period of time in response to the computing component alternating from the first state to the second state.

First claim

Opening claim text (preview).

What is claimed: 1. A system, comprising: a power supply coupled to a plurality of computing components by a single power rail; a first timer to determine a quantity of time the power supply has continuously exceeded a power threshold; a second timer to determine a quantity of time the power supply has continuously been below the power threshold; and a controller, comprising instructions to: stop the first timer when the second timer has reached a first time limit; stop the second timer when the power supply has exceeded the power threshold; and deactivate the power supply when the first timer reaches a second time limit. 2. The system of claim 1 , wherein the controller includes instructions to: set the first timer to zero when the second timer has reached the first time limit; and set the second timer to zero when the power supply has exceeded the power threshold. 3. The system of claim 1 , wherein the controller includes instructions to alter a load of the plurality of computing components to prevent the first timer from reaching the second time limit. 4. A controller, comprising instructions to: set a first timer to determine a quantity of time a power supply has continuously exceeded a power threshold; set a second timer to determine a quantity of time the power supply has continuously been below the power threshold; stop the first timer when the second timer has reached a first time limit; stop the second timer when the power supply has exceeded the power threshold; and deactivate the power supply when the first timer reaches a second time limit. 5. The controller of claim 4 , wherein the power supply is coupled to the computing component through a single power rail. 6. The controller of claim 4 , comprising instructions to alter a load of a computing component below the power threshold when the first timer reaches a second time limit. 7. The controller of claim 4 , comprising instructions to: set the first timer to zero when the second timer reaches a first time limit; and set the second timer to zero when the power supply has exceeded the power threshold. 8. A non-transitory machine-readable storage medium having stored thereon machine-readable instructions to cause a computer processor to: set a first timer to determine a quantity of time a power supply has continuously exceeded a power threshold; set a second timer to determine a quantity of time the power supply has continuously been below the power threshold; stop the first timer when the second timer has reached a first time limit; stop the second timer when the power supply has exceeded the power threshold; and deactivate the power supply when the first timer reaches a second time limit. 9. The medium of claim 8 , comprising instructions to restart the first timer when the second timer has reached a first time limit. 10. The medium of claim 8 , comprising instructions to restart the second timer when the power supply has exceeded the power threshold. 11. The medium of claim 8 , comprising instructions to alter a load of the plurality of computing components before the first timer reaches the second time limit. 12. The medium of claim 8 , wherein the power supply is coupled to the computing component through a single power rail.

Assignees

Inventors

Classifications

  • by lowering the supply or operating voltage · CPC title

  • responsive to product of voltage and current · CPC title

  • for DC applications · CPC title

  • G06F1/28Primary

    Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

  • with timing means {(in general H02H3/027; thermal delay H02H3/085; timing means for undervoltage protection H02H3/247)} · CPC title

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Frequently asked questions

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What does patent US11537189B2 cover?
Example implementations relate to power supply controllers. In some examples, a controller can include instructions to: set a power threshold for a power supply coupled to a computing component when the computing component is operating in a first state, determine when the computing component is alternating from the first state to a second state, and allow the power supply to exceed the power th…
Who is the assignee on this patent?
Hewlett Packard Development Co
What technology area does this patent fall under?
Primary CPC classification G06F1/28. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 27 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).