Semiconductor device and method of manufacturing the semiconductor device

Patent metadata

Field	Value
Publication number	US-11527471-B2
Application number	US-202016835582-A
Country	US
Kind code	B2
Filing date	Mar 31, 2020
Priority date	Apr 24, 2019
Publication date	Dec 13, 2022
Grant date	Dec 13, 2022

Abstract

A semiconductor device is a substrate inserted lead-type semiconductor device to be mounted through insertion of a plurality of lead terminals into a plurality of respective through holes of a substrate. The semiconductor device includes: an energization controller including a semiconductor element and wiring; a sealing resin to cover the energization controller; and the lead terminals each having one end side connected to the energization controller and the other end side protruding from the sealing resin. The lead terminals each have a protrusion formed on a part of the other end side protruding from the sealing resin.

First claim

What is claimed is:

1. A substrate inserted lead type semiconductor device to be mounted through insertion of a plurality of lead terminals into a plurality of respective through holes of a substrate, the semiconductor device comprising:
an energization controller including a semiconductor element and wiring;
a sealing resin to cover the energization controller; and
each of the plurality of lead terminals having one end side connected to the energization controller and an other end side protruding from the sealing resin, wherein
each of the plurality of lead terminals has a protrusion formed on a part of the other end side protruding from the sealing resin,
each of the plurality of lead terminals has a first narrow portion narrower than the protrusion positioned between the protrusion and the sealing resin and a second narrow portion narrower than the protrusion positioned on a side of the protrusion opposite to the sealing resin,
each of the first narrow portions is bent, and
a plurality of grooves are positioned on both of a front side and a back side of each of the plurality of lead terminals, the plurality of grooves extending from the second narrow portion toward the first narrow portion, and a portion of each of the plurality of lead terminals interposing between the plurality of grooves positioned on the front side and the plurality of grooves positioned on the back side.

2. The semiconductor device according to claim 1 , wherein
a portion of each of the plurality of lead terminals and the protrusion to be located inside a through hole of the substrate and a portion around the portion have the plurality of grooves.

3. The semiconductor device according to claim 1 , wherein
the protrusion is tapered in a front view to become narrower with increasing distance from the energization controller, and
the protrusion has a taper angle with respect to a side surface of a respective lead terminal of the plurality of lead terminals of less than 45°.

4. The semiconductor device according to claim 3 , wherein
a tapered portion of the protrusion is curved inward toward a center of the respective lead terminal of the plurality of lead terminals.

5. A method of manufacturing the semiconductor device according to claim 1 , the method comprising:
(a) placing a lead frame having a plurality of leads, a frame to connect an end side of each of the plurality of leads, and an outer frame to enclose the plurality of leads and the frame;
(b) forming the energization controller on an other end side of each of the plurality of leads;
(c) sealing the energization controller with the sealing resin;
(d) pressing the frame to form the protrusion formed on each of the plurality of lead terminals; and
(e) cutting the outer frame through pressing to form the plurality of lead terminals.

6. The method of manufacturing the semiconductor device according to claim 5 , the method further comprising:
(f) forming the plurality of grooves through pressing with respect to a portion of each of the plurality of lead terminals and the protrusion to be located inside one of the plurality of respective through holes of the substrate and a portion around the portion.

7. The semiconductor device according to claim 1 , wherein
each of the plurality of grooves has a rectangular shape in a cross-sectional view of each of the plurality of lead terminals.

8. The semiconductor device according to claim 1 , wherein
the plurality of grooves are serrated grooves.

9. The semiconductor device according to claim 8 , wherein
each of the plurality of grooves has a triangular shape in a cross-sectional view of each of the plurality of lead terminals.

10. The semiconductor device according to claim 1 , wherein
side surfaces of each of the plurality of grooves are inclined away from a center of each of the plurality of grooves.

11. The semiconductor device according to claim 10 , wherein
each of the plurality of grooves has a trapezoidal shape in a cross-sectional view of each of the plurality of lead terminals.

Assignees

• Mitsubishi Electric Corp

Inventors

• Nakamura Kota
• Tominaga Hiromi
• Murakami Junichi
• Shigeoka Hidenori

Classifications

• H10W74/114

  by a substrate and the encapsulations · CPC title

• H10W70/092

  Adapting interconnections, e.g. making engineering charges, repairing · CPC title

• H10W70/429

  being the outer leads · CPC title

• H10W70/479 Primary

  on or in insulating or insulated package substrates, interposers, or redistribution layers · CPC title

• H10W70/424 Primary

  Cross-sectional shapes (H10W70/481 takes precedence) · CPC title