Ball grid array current meter with a current sense wire

Patent metadata

Field	Value
Publication number	US-11519957-B2
Application number	US-201916583464-A
Country	US
Kind code	B2
Filing date	Sep 26, 2019
Priority date	Sep 26, 2019
Publication date	Dec 6, 2022
Grant date	Dec 6, 2022

Abstract

Electrical current flow in a ball grid array (BGA) package can be measured by an apparatus including an integrated circuit (IC) electrically connected to the BGA package. Solder balls connect the BGA package to a printed circuit board (PCB) and are arranged to provide a contiguous channel for a current sense wire. A subset of solder balls is electrically connected to supply current from the PCB through the BGA package to the IC. The current sense wire is attached to the upper surface of the PCB, within the contiguous channel, and surrounds the subset of solder balls. An amplifier is electrically connected to the current sense wire ends to amplify a voltage induced on the current sense wire by current flow into the BGA package. A sensing analog-to-digital converter (ADC) is electrically connected to convert a voltage at the output of the amplifier into digital output signals.

First claim

What is claimed is:

1. A ball grid array (BGA) current meter apparatus for measuring electrical current flow in a BGA package, the BGA current meter apparatus comprising:
an integrated circuit (IC), electrically connected to the BGA package;
a set of solder balls electrically connected to a corresponding first set of attachment pads located on a lower surface of the BGA package;
a subset of the set of solder balls electrically connected to supply current to the IC;
a printed circuit board (PCB) including:
a second set of attachment pads positionally corresponding to the first set of attachment pads;
a current sense wire attached to further attachment pads located on an upper surface of the PCB and located in a contiguous channel, the current sense wire surrounding the subset of solder balls;

an amplifier electrically connected to ends of the current sense wire, the amplifier configured to amplify a voltage induced on the current sense wire by current flow into the BGA package; and
a sensing analog-to-digital converter (ADC) electrically connected to and configured to convert, into digital output signals, a voltage at the output of the amplifier.

2. The BGA current meter apparatus of claim 1 , further comprising a second IC electrically connected to the BGA package, wherein the subset of the set of solder balls is further electrically connected to supply, from a PCB, current to the second IC.

3. The BGA current meter apparatus of claim 1 , wherein the current sense wire is fabricated from a metal selected from the group consisting of: aluminum and copper.

4. The BGA current meter apparatus of claim 1 , wherein the current sense wire includes a laminated outer insulating layer selected from the group consisting of: polyimide, polyamide, polyvinyl formal (Formvar), polyurethane, polyester, polyester-polyimide, polyamide-polyimide, amide-imide, polymer and insulating varnish.

5. The BGA current meter apparatus of claim 1 , further comprising an external logic device electrically connected to receive the digital output signals from the ADC.

6. The BGA current meter apparatus of claim 5 , wherein the external logic device is selected from the group consisting of: a computer system, a processor, a service processor, a test instrument and an external logic IC.

7. The BGA current meter apparatus of claim 5 , wherein the external logic device is configured to initiate a corrective action in response to receiving digital output signals representing a current that is above a threshold.

8. The BGA current meter apparatus of claim 5 , wherein the external logic device is located on the PCB.

9. The BGA current meter apparatus of claim 5 , wherein the external logic device is located in location remote to the PCB.

Assignees

• IBM

Inventors

• Berge Layne A
• Doyle Matthew
• Schoneck Kyle
• Liang Thomas W
• Walther Matthew A
• Bjorgaard Jason J
• Dangler John R

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W70/093

  Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title

• H10W70/63

  Vias, e.g. via plugs · CPC title