Calibration of an RF attenuator

Patent metadata

Field	Value
Publication number	US-11515899-B2
Application number	US-202217648993-A
Country	US
Kind code	B2
Filing date	Jan 26, 2022
Priority date	Feb 26, 2021
Publication date	Nov 29, 2022
Grant date	Nov 29, 2022

Abstract

The present disclosure relates to a circuit including an input terminal configured to receive a first signal at a first frequency; a demodulation chain connected to the input terminal and including a low-noise amplifier having an input coupled to the terminal; a controllable variable impedance connected between a first node and a node configured to receive a reference potential, the first node being connected to the input terminal and/or to the amplifier input; and a current source configured to deliver a current at the first frequency to the first node.

First claim

What is claimed is:

1. A circuit comprising:
an input terminal configured to receive a first signal at a first frequency;
a demodulation chain comprising a low-noise amplifier having an input coupled to the input terminal;
a controllable variable impedance connected between a first node and a node configured to receive a reference potential, wherein the first node is connected to the input terminal and/or to the amplifier input; and
a current source configured to deliver a current at the first frequency to the first node.

2. The circuit of claim 1 , wherein the current source comprises:
a first circuit configured to deliver a second signal at a frequency of a local oscillator of the demodulation chain;
a second circuit configured to deliver a third signal at an intermediate frequency of the demodulation chain;
a frequency mixer configured to receive the second and third signals, wherein an output of the frequency mixer is coupled to an internal node of the current source; and
a resistor coupling the internal node to the first node.

3. The circuit of claim 2 , wherein the third signal is a square signal and the frequency mixer is a switch-mode mixer controlled by the third signal.

4. The circuit of claim 3 , wherein the second circuit comprises an oscillator configured to deliver a signal at a frequency greater than the intermediate frequency of the demodulation chain, and a frequency divider configured to deliver the third signal from the signal delivered by the oscillator.

5. The circuit of claim 4 , wherein the oscillator of the second circuit is a quartz oscillator.

6. The circuit of claim 3 , wherein the mixer comprises a first switch connected between the output of the mixer and a node configured to receive the second signal, and a second switch connected between the output of the mixer and the node configured to receive the reference potential, wherein the first and second switches are configured to be controlled in phase opposition from the third signal.

7. The circuit of claim 2 , wherein the first circuit comprises:
a circuit configured to deliver a fourth square signal at a frequency equal to four times the frequency of the local oscillator;
a first frequency divider configured to divide by two the frequency of the fourth square signal;
a second frequency divider configured to divide by four the frequency of the fourth square signal;
a two-input gate configured to receive an output signal of the first frequency divider and an output signal of the second frequency divider, wherein the gate is configured to implement an XOR function between the signals received by its inputs;
a first resistor coupling an output of the second frequency divider to an output of the first circuit; and
a second resistor coupling an output of the gate to the output of the first circuit.

8. The circuit of claim 7 , wherein a value of the first resistor is substantially equal, for example, equal, to 0.348/0.84 times a value of the second resistor.

9. The circuit of claim 2 , wherein the current source comprises a common-mode removal capacitive element, wherein the resistor coupling the internal node of the current source to the first node is series-connected with the common-mode removal capacitive element between the internal node and the first node.

10. The circuit of claim 1 , wherein the current source is further configured to be selectively turned on or off.

11. A method of operating a circuit, the method comprising:
a) receiving, by an input of a low-noise amplifier in a demodulation chain, a first signal at a first frequency;
b) delivering, by a current source, a current at the first frequency to a first node coupled to the input of the low-noise amplifier;
c) selecting a value of a controlled variable impedance coupled between the first node and a reference potential node;
d) obtaining a signal at an output of the demodulation chain, while the current is delivered to the first node by the current source; and
e) determining, for the variable impedance value selected at step c), an attenuation value, introduced into the demodulation chain by the variable impedance, at least from the signal obtained at step d).

12. The method of claim 11 , further comprising:
between steps c) and e), a step d′) comprising obtaining another signal at the output of the demodulation chain while the current source is off; and
at step e), determining the attenuation value at least from the signal obtained at step d) and from the another signal obtained at step d′).

13. The method of claim 11 , further comprising repeating steps c) and e) for each of a plurality of values of the variable impedance.

14. The method of claim 13 , wherein at one of the steps c), the variable impedance is equivalent to an open circuit for the selected value.

15. The method of claim 14 , further comprising, at each step e), determining the attenuation value at least from the signal observed at the corresponding step d) and from the signal observed at step d) when the variable impedance is equivalent to the open circuit.

16. The method of claim 11 , further comprising:
delivering, by a first circuit of the current source, a second signal at a frequency of a local oscillator of the demodulation chain;
delivering, by a second circuit of the current source, a third signal at an intermediate frequency of the demodulation chain;
receiving, by a frequency mixer having an output coupled to an internal node of the current source, the second and third signals; and
coupling, by a resistor, the internal node to the first node.

17. The method of claim 16 , wherein the third signal is a square signal and the frequency mixer is a switch-mode mixer controlled by the third signal.

18. The method of claim 17 , further comprising:
delivering, by an oscillator of the second circuit, a signal at a frequency greater than the intermediate frequency of the demodulation chain; and
delivering, by a frequency divider of the second circuit, the third signal from the signal delivered by the oscillator.

19. The method of claim 17 , further comprising controlling first and second switches of the mixer in phase opposition from the third signal, the first switch being connected between the output of the mixer and a node receiving the second signal, and the second switch connected between the output of the mixer and the reference potential node.

20. The method of claim 16 , further comprising:
delivering, by a fourth circuit of the first circuit, a fourth square signal at a frequency equal to four times the frequency of the local oscillator;
dividing, by a first frequency divider of the first circuit, by two the frequency of the fourth square signal;
dividing, by a second frequency divider of the first circuit, by four the frequency of the fourth square signal;
receiving, by a two-input gate of the first circuit, an output signal of the first frequency divider and an output signal of the second frequency divider,
implementing, by the gate, an XOR function between the signals received by its inputs;
coupling, by a first resistor of the first circuit, an output of the second frequency divider to an output of the first circuit; and
coupling, by a second resistor of the first circuit, an output of the gate to the output of the first circuit.

Assignees

• St Microelectronics Grenoble 2

Inventors

• Ayraud Michel
• Level Philippe

Classifications

• G05F1/56 Primary

  using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title

• H03G2201/206

  being in radio frequency · CPC title

• H03G2201/106

  being attenuating element · CPC title

• H04B1/0078 Primary

  with a common intermediate frequency amplifier for the different intermediate frequencies, e.g. when using switched intermediate frequency filters · CPC title

• H04B1/30

  for homodyne or synchrodyne receivers (demodulator circuits H03D1/22) · CPC title