System and method for extending NVRAM-based write-cache onto SSDs

Patent metadata

Field	Value
Publication number	US-11513727-B2
Application number	US-202117238946-A
Country	US
Kind code	B2
Filing date	Apr 23, 2021
Priority date	Apr 23, 2021
Publication date	Nov 29, 2022
Grant date	Nov 29, 2022

Abstract

A method, computer program product, and computer system for extending, by a computing device, transaction log page-buffers for Non-Volatile Random Access Memory (NVRAM) onto a solid state drive (SSD). It may be determined whether a bandwidth limit of the NVRAM has reached a threshold bandwidth. An IO may be processed on one of the NVRAM and the SSD based upon, at least in part, whether the bandwidth limit of the NVRAM has reached the threshold bandwidth.

First claim

What is claimed is:

1. A computer-implemented method comprising:
extending, by a computing device, transaction log page-buffers for Non-Volatile Random Access Memory (NVRAM) onto a solid state drive (SSD);
determining whether a bandwidth utilization of the NVRAM has reached a threshold bandwidth; and
processing an IO on one of the NVRAM and the SSD based upon, at least in part, whether the bandwidth utilization of the NVRAM has reached the threshold bandwidth;
wherein page-descriptors (PDs) for NVRAM based transaction log page-buffers (PBs) of the NVRAM and PDs for SSD based transaction log PBs of the SSD are maintained on the NVRAM in a ring configuration.

2. The computer-implemented method of claim 1 wherein processing the IO on one of the NVRAM and the SSD based upon, at least in part, whether the bandwidth utilization of the NVRAM has reached the threshold bandwidth includes processing the IO on the SSD only when the bandwidth utilization of the NVRAM has reached the threshold bandwidth.

3. The computer-implemented method of claim 2 wherein the IO is processed on the NVRAM when a size of the IO is less than a threshold size and wherein the IO is processed on the SSD when the size of the IO is greater than the threshold size.

4. The computer-implemented method of claim 1 wherein the PDs for the SSD based transaction log PBs are created using Physical Large Blocks (PLBs) in a parity RAID configuration.

5. The computer-implemented method of claim 4 further comprising mapping directly onto the PLBs without at least one of compression and deduplication.

6. The computer-implemented method of claim 5 further comprising performing at least one of the compression and deduplication when ingesting into the SSD based transaction log PBs.

7. A computer program product residing on a non-transitory computer readable storage medium having a plurality of instructions stored thereon which, when executed across one or more processors, causes at least a portion of the one or more processors to perform operations comprising:
extending transaction log page-buffers for Non-Volatile Random Access Memory (NVRAM) onto a solid state drive (SSD);
determining whether a bandwidth utilization of the NVRAM has reached a threshold bandwidth; and
processing an IO on one of the NVRAM and the SSD based upon, at least in part, whether the bandwidth of the NVRAM has reached the threshold bandwidth;
wherein page-descriptors (PDs) for NVRAM based transaction log page-buffers (PBs) of the NVRAM and PDs for SSD based transaction log PBs of the SSD are maintained on the NVRAM in a ring configuration.

8. The computer program product of claim 7 wherein processing the IO on one of the NVRAM and the SSD based upon, at least in part, whether the bandwidth utilization of the NVRAM has reached the threshold bandwidth includes processing the IO on the SSD only when the bandwidth utilization of the NVRAM has reached the threshold bandwidth.

9. The computer program product of claim 8 wherein the IO is processed on the NVRAM when a size of the IO is less than a threshold size and wherein the IO is processed on the SSD when the size of the IO is greater than the threshold size.

10. The computer program product of claim 7 wherein the PDs for the SSD based transaction log PBs are created using Physical Large Blocks (PLBs) in a parity RAID configuration.

11. The computer program product of claim 10 wherein the operations further comprise mapping directly onto the PLBs without at least one of compression and deduplication.

12. The computer program product of claim 11 wherein the operations further comprise performing at least one of the compression and deduplication when ingesting into the SSD based transaction log PBs.

13. A computing system including one or more processors and one or more memories configured to perform operations comprising:
extending transaction log page-buffers for Non-Volatile Random Access Memory (NVRAM) onto a solid state drive (SSD);
determining whether a bandwidth utilization of the NVRAM has reached a threshold bandwidth; and
processing an IO on one of the NVRAM and the SSD based upon, at least in part, whether the bandwidth utilization of the NVRAM has reached the threshold bandwidth;
wherein page-descriptors (PDs) for NVRAM based transaction log page-buffers (PBs) of the NVRAM and PDs for SSD based transaction log PBs of the SSD are maintained on the NVRAM in a ring configuration.

14. The computing system of claim 13 wherein processing the IO on one of the NVRAM and the SSD based upon, at least in part, whether the bandwidth utilization of the NVRAM has reached the threshold bandwidth includes processing the IO on the SSD only when the bandwidth utilization of the NVRAM has reached the threshold bandwidth.

15. The computing system of claim 14 wherein the IO is processed on the NVRAM when a size of the IO is less than a threshold size and wherein the IO is processed on the SSD when the size of the IO is greater than the threshold size.

16. The computing system of claim 13 wherein the operations further comprise mapping directly onto the PLBs without at least one of compression and deduplication.

17. The computing system of claim 16 wherein the operations further comprise performing at least one of the compression and deduplication when ingesting into the SSD based transaction log PBs.

Assignees

• Emc Ip Holding Co Llc

Inventors

• Vankamamidi Vamsi K
• Gazit Ronen
• Armangau Philippe
• Alkalay Amitai

Classifications

• G06F3/0688 Primary

  Non-volatile semiconductor memory arrays · CPC title

• G06F3/0641

  De-duplication techniques · CPC title

• G06F3/0613

  in relation to throughput · CPC title

• G06F3/0608

  Saving storage space on storage systems · CPC title

• G06F3/0656 Primary

  Data buffering arrangements · CPC title