A Method and a First Device for Clock Synchronization
US-2021058181-A1 · Feb 25, 2021 · US
US11502883B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11502883-B2 |
| Application number | US-202017108912-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 1, 2020 |
| Priority date | Dec 1, 2020 |
| Publication date | Nov 15, 2022 |
| Grant date | Nov 15, 2022 |
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A mixer in a receiver converts a sounding sequence of alternating ones and zeros to an intermediate frequency signal. A digital mixer converts the intermediate frequency signal to a baseband signal that contains a positive tone and a negative tone. A frequency offset correction circuit generates frequency offset corrections based on frequency offset estimates of the frequency offset between a transmitter of the sounding sequence and the receiver. A frequency adjustment circuit adjusts a frequency of the mixer or the digital mixer to thereby center the positive tone and the negative tone around DC. DFT circuits perform single bin DFTs respectively centered on the positive and negative tones. Phases of the positive and negative tones are calculated based on outputs of the DFT circuits and the phases are used to determine fractional time value associated with a distance measurement between the transmitter and receiver.
Opening claim text (preview).
What is claimed is: 1. A communications device, comprising: a receiver to receive a sounding sequence and supply a baseband signal having a positive tone and a negative tone from the sounding sequence; wherein the receiver includes, a frequency offset estimator to supply frequency offset estimates of frequency offset between the communications device and a second communications device transmitting the sounding sequence; a frequency offset correction circuit coupled to the frequency offset estimator to supply a frequency offset correction signal with frequency offset corrections based on the frequency offset estimates; and a frequency adjustment circuit coupled to the frequency offset correction signal to supply an adjusted frequency control signal to adjust a frequency used by a mixer circuit in the receiver based on a current one of the frequency offset corrections to thereby better center the positive tone and the negative tone around 0 Hz; and wherein the communications device determines a fractional timing value associated with measuring a distance between the communications device and the second communications device based on respective phase values of the positive tone and the negative tone. 2. The communications device as recited in claim 1 , wherein the receiver further comprises: a first discrete Fourier transform (DFT) circuit and a second DFT circuit to perform respectively single bin discrete Fourier transforms centered on a nominal value of the positive tone and a nominal value of the negative tone; and an arctangent function to generate the respective phase values of the positive tone and the negative tone based on outputs of the first and second DFT circuits. 3. The communications device as recited in claim 2 , wherein the first DFT circuit comprises: a first complex multiplier coupled to receive real and imaginary components of the baseband signal and to receive first DFT coefficients corresponding to the nominal value of the positive tone; and a first accumulator and a second accumulator to accumulate respectively, real and imaginary outputs of the first complex multiplier; and wherein the second DFT circuit comprises: a second complex multiplier coupled to receive the real and imaginary components of the baseband signal and second DFT coefficients corresponding to the nominal value of the negative tone; and a third accumulator and a fourth accumulator to respectively accumulate real and imaginary outputs of the second complex multiplier. 4. The communications device as recited in claim 1 wherein the receiver further comprises: a clock synthesizer circuit coupled to supply a local oscillator signal to the mixer circuit and is coupled to the frequency adjustment circuit, the local oscillator signal having a frequency determined, at least in part, according to a current value of the frequency offset correction signal corresponding to the current one of the frequency offset corrections; and wherein the mixer circuit is coupled to receive the local oscillator signal and to down convert an RF signal received by the communications device to an intermediate frequency signal. 5. The communications device as recited in claim 1 wherein, the mixer circuit is a digital mixer to down convert a digital representation of the sounding sequence to the baseband signal; and wherein the digital mixer is coupled to receive a frequency signal from the frequency adjustment circuit indicative of the frequency used by the digital mixer. 6. The communications device as recited in claim 1 wherein the frequency adjustment circuit comprises: a summing circuit to sum a first value indicative of a first frequency and a current value of the frequency offset correction signal corresponding to the current one of the frequency offset corrections to generate the adjusted frequency control signal. 7. The communications device as recited in claim 1 , wherein the frequency offset correction circuit includes a shift circuit responsive to a first value of a control signal to use a first scaling factor on a first plurality of representations of the frequency offset estimates received by the shift circuit; and wherein the shift circuit is responsive to a second value of the control signal to use a second scaling factor on a second plurality of representations of the frequency offset estimates received by the shift circuit, the second scaling factor reducing the second plurality of representations of the frequency offset estimates. 8. The communications device as recited in claim 7 , wherein the frequency offset correction circuit further comprises: an accumulator circuit coupled to the shift circuit to accumulate outputs of the shift circuit and to periodically supply accumulator outputs as the frequency offset correction signal. 9. The communications device as recited in claim 8 wherein a first of the frequency offset corrections is applied during a first portion of the sounding sequence and is generated using accumulated shifter outputs generated using the first scaling factor and remaining ones of the frequency offset corrections are applied during later portions of the sounding sequence, the remaining ones of the frequency offset corrections being generated using accumulated shifter outputs generated using the second scaling factor. 10. The communications device as recited in claim 7 , wherein the first scaling factor causes the shift circuit to supply full scale values of the first plurality of representations of the frequency offset estimates and the second scaling factor causes the shift circuit to divide the second plurality of representations of the frequency offset estimates received by the shift circuit. 11. The communications device as recited in claim 7 , further comprising: a delay circuit to delay a frame detect signal for a predetermined time period and supply a delayed frame detect signal as the control signal, the frame detect signal indicative of detection of a received packet and a beginning of the sounding sequence; and wherein the first value of the control signal is utilized in response to a deasserted delayed frame detect signal and the second value of the control signal is used in response to an asserted delayed frame detect signal. 12. A method for determining a fractional timing value associated with measuring a distance between a first communications device including a receiver and a second communications device including a transmitter, the method comprising: receiving a sounding sequence at the receiver from the second communications device, the sounding sequence containing a positive tone and a negative tone; providing frequency offset estimates of frequency offset between the transmitter and the receiver; generating frequency offset corrections based on the frequency offset estimates; adjusting a frequency used by a mixer in the receiver to down convert a receiver signal based on a current one of the frequency offset corrections to thereby better center the positive tone and the negative tone around 0 Hz; and determining the fractional timing value based on respective phases of the positive tone and the negative tone. 13. The method as recited in claim 12 further comprising: adjusting a frequency of a local oscillator signal based on the one of the frequency offset corrections; supplying the local oscillator signal from a local oscillator to the mixer; and converting an RF signal in the mixer to a low intermediate frequency signal using the local oscillator signal. 14. The method as recited in claim 12 wherein the mixer is a digital mixer and the method further comprises: adju
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