Semiconductor device, inverter circuit, drive device, vehicle, and elevator

Patent metadata

Field	Value
Publication number	US-11495665-B2
Application number	US-202117191989-A
Country	US
Kind code	B2
Filing date	Mar 4, 2021
Priority date	Jul 9, 2020
Publication date	Nov 8, 2022
Grant date	Nov 8, 2022

Abstract

A semiconductor device of an embodiment includes: a first trench in a silicon carbide layer and extending in a first direction; a second trench and a third trench located in a second direction orthogonal to the first direction with respect to the first trench and adjacent to each other in the first direction, n type first silicon carbide region, p type second silicon carbide region on the first silicon carbide region, n type third silicon carbide region on the second silicon carbide region, p type fourth silicon carbide region between the first silicon carbide region and the second trench, and p type fifth silicon carbide region located between the first silicon carbide region and the third trench; a gate electrode in the first trench; a first electrode; and a second electrode. A part of the first silicon carbide region is located between the second trench and the third trench.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a silicon carbide layer having a first face and a second face opposite to the first face, the first face being parallel to a first direction and a second direction, the second direction being orthogonal to the first direction, the silicon carbide layer including
a first trench located on a side of the first face and extending in the first direction,
a second trench located on a side of the first face and located in the second direction with respect to the first trench,
a third trench located on a side of the first face, the third trench located in the second direction with respect to the first trench, the third trench located in the first direction with respect to the second trench,
a first silicon carbide region of n type,
a second silicon carbide region of p type located between the first silicon carbide region and the first face,
a third silicon carbide region of n type located between the second silicon carbide region and the first face,
a fourth silicon carbide region of p type located between the first silicon carbide region and the second trench, and
a fifth silicon carbide region of p type located between the first silicon carbide region and the third trench;

a gate electrode located in the first trench;
a gate insulating layer located between the gate electrode and the silicon carbide layer;
a first electrode located on a side of the first face of the silicon carbide layer, a part of the first electrode located in the second trench; and
a second electrode located on a side of the second face of the silicon carbide layer,
wherein
a part of the first silicon carbide region is located between the second trench and the third trench,
the first silicon carbide region includes a first region, a second region, and a third region,
the second region is located between the first region and the second silicon carbide region and between the first trench and the second trench,
the third region is located between the first region and the second silicon carbide region and between the second trench and the third trench,
an n type impurity concentration of the second region is higher than an n type impurity concentration of the first region, and
an n type impurity concentration of the third region is higher than an n type impurity concentration of the first region.

2. The semiconductor device according to claim 1 , wherein the part of the first silicon carbide region is located between the fourth silicon carbide region and the fifth silicon carbide region.

3. The semiconductor device according to claim 1 , wherein the silicon carbide layer further including a sixth silicon carbide region of p type located between the first silicon carbide region and the first trench.

4. The semiconductor device according to claim 1 , wherein a length of the second trench in the first direction is larger than a length of the second trench in the second direction.

5. The semiconductor device according to claim 1 , wherein a second distance between the second trench and the third trench is larger than a first distance between the first trench and the second trench.

6. The semiconductor device according to claim 5 , wherein the second distance is equal to or less than 3 times the first distance.

7. The semiconductor device according to claim 1 , wherein an n type impurity concentration of the third region is higher than an n type impurity concentration of the second region.

8. An inverter circuit comprising a semiconductor device according to claim 1 .

9. A drive device comprising a semiconductor device according to claim 1 .

10. A vehicle comprising a semiconductor device according to claim 1 .

11. An elevator comprising a semiconductor device according to claim 1 .

Assignees

• Toshiba Kk

Inventors

• Tanaka Katsuhisa
• Iijima Ryosuke
• Kyogoku Shinya

Classifications

• H10D64/01366

  the semiconductor being silicon carbide · CPC title

• H10P50/00

  Etching of wafers, substrates or parts of devices · CPC title

• B61C9/38

  Transmission systems in or for locomotives or motor railcars with electric motor propulsion (electrical features B60L) · CPC title

• B60L50/51

  characterised by AC-motors · CPC title

• H02M7/537

  using semiconductor devices only, e.g. single switched pulse inverters · CPC title